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Hitachi SH7032 - Page 229

Hitachi SH7032
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194
1. Transfer requests are generated simultaneously for channels 1 and 0.
2. Channel 0 has a higher priority, so the channel 0 transfer begins first (channel 1 waits for
transfer).
3. A channel 3 transfer request occurs during the channel 0 transfer (channels 1 and 3 are both
waiting)
4. When the channel 0 transfer ends, channel 0 becomes the lowest priority.
5. At this point, channel 3 has a higher priority than channel 1, so the channel 3 transfer begins
(channel 1 waits for transfer).
6. When the channel 3 transfer ends, channel 3 becomes the lowest priority.
7. The channel 1 transfer begins.
8. When the channel 1 transfer ends, channels 1 and 2 shift downward in priority so that channel
1 becomes the lowest priority.
1
1, 3
1
None
(1) Channels 0 and 1
(3) Channel 3
(2) Channel 0
transfer starts
Priority order
changes
0 > 3 > 2 > 1
3 > 2 > 1 > 0
2 > 1 > 0 > 3
0 > 3 > 2 > 1
Transfer request Waiting channel(s) DMAC operation Channel priority
(4) Channel 0
transfer ends
Priority order
changes
Priority order
changes
(5) Channel 3
transfer starts
(6) Channel 3
transfer ends
(7) Channel 1
transfer starts
(8) Channel 1
transfer ends
Figure 9.4 Changes in Channel Priority in Round-Robin Mode

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