645
Table A.78 Register Status in Reset and Power-Down States (cont)
Reset State Power-Down State
Category Abbreviation Power On Manual Standby Sleep
A/D converter ADDRA–
ADDRD
Initialized Initialized Initialized Held
ADCSR
ADCR
Pin function controller PAIOR,PBIOR Initialized Held Held Held
(PFC)
PACR1,PACR2,
PBCR1,PBCR2
CASCR
Parallel I/O ports (I/O) PADR,PBDR Initialized Held Held Held
PCDR
*
3
*
3
*
3
*
3
Power-down-state related SBYCR Initialized Initialized Held Held
Note: *3 Bits 15–8 are always undetermined, bits 7–0 always reflect the state of the
corresponding pin.
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