7
Appendix A 
Sample Tboot Serial Output (The output may vary depending on the system configuration): 
 
Intel(r) TXT Configuration Registers: 
 STS: 0x188d1 
   senter_done: TRUE 
      sexit_done: FALSE 
      mem_unlock: TRUE 
      mem_config_lock: TRUE 
      private_open: TRUE 
      mem_config_ok: TRUE 
 ESTS: 0x0 
      txt_reset: FALSE 
      txt_wake_error: FALSE 
 E2STS: 0x200000016 
      slp_entry_error: FALSE 
      secrets: TRUE 
      block_mem: TRUE 
      reset: FALSE 
  ERRORCODE: 0x0 
 DIDVID: 0x7f90008086 
      vendor_id: 0x8086 
      device_id: 0x9000 
      revision_id: 0x7f 
 SINIT.BASE: 0x3aa00000 
  SINIT.SIZE: 131072B (0x20000) 
 HEAP.BASE: 0x3aa20000 
  HEAP.SIZE: 917504B (0xe0000) 
 DPR: 0x3ab00031 
      lock: TRUE 
      top: 0x3ab00000 
      size: 3MB (3145728B) 
***********************************************************
   TXT measured launch: TRUE 
   secrets flag set: TRUE 
***********************************************************
TBOOT log: 
 max_size=4fe4 
 cu rr _ p os= 4 418  
 buf: 
TBOOT: ******************* TBOOT ******************* 
TBOOT:    2008-07-14 10:56 -0500 76:d4530b565621