7.9 Ultra DMA timings
The Ultra DMA timings meet Mode 0, 1, 2, 3, 4, and 5 of the Ultra DMA Protocol.
7.9.1 Initiating Read DMA
DSTROBE
HDMARDY-
DMACK-
DMARQ
STOP
tUI
tACK tENV
tACK tENV
tZIORDY
tFS tCYC
t2CYC
DD(15:0)
tAZD
tAZ
xxxxxxxxxxxxxxxxxxxxxxxxx
xxx xxx xxx
Host drives DD
Device drives DD
tDH
tDS
RD Data RD Data
RD Data
tCYC
–4.8–5–5–5–5–5Data hold time at hosttDH
–4.8–5–7–7–10–15Data setup time at hosttDS
–0–0–0–0–0–0Drivers to asserttZAD
1010–10–10–10–10–
Maximum time allowed for
output drivers to release
tAZ
-38–57–86–115–154–230Two cycle timet2CYC
–16.8–25–39–54–73–112Cycle timetCYC
90–12001300170020002300First DSTROBE timetFS
–0–0–0–0–0–0
Minimum time before
driving IORDY
tZIORDY
502055205520702070207020Envelope timetENV
–20–20–20–20–20–20Setup time for DMACK-tACK
–0–0–0–0–0–0Unlimited interlock timetUI
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MODE 5MODE 4MODE 3MODE 2MODE 1MODE 0
PARAMETER DESCRIPTION
Figure 40. Ultra DMA cycle timings (Initiating Read)
Travelstar 60GH & 40GN hard disk drive specifications
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