12.0 Registers
Invalid addressInvalid addressXXXAA
CommandStatus111NA
2
LBA bits 24–27
2
LBA bits 24–27
011NA
Device/HeadDevice/Head.011NA
2
LBA bits 16–23
2
LBA bits 16–23
101NA
Cylinder HighCylinder High101NA
2
LBA bits 8–15
2
LBA bits 8–15
001NA
Cylinder LowCylinder Low001NA
2
LBA bits 0–7
2
LBA bits 0–7
110NA
Sector NumberSector Number110NA
Sector CountSector Count010NA
FeaturesError Register100NA
DataData 000NA
Command block registersAddresses
Not usedDevice Address111AN
Device ControlAlternate Status011AN
Not used
Data bus high impedance
1
X01AN
Not used
Data bus high impedance
1
XX0AN
Control block registersAddresses
Not used
Data bus high impedance
1
XXXNN
WRITE (DIOW–)READ (DIOR–)DA0DA1DA2CS1–CS0–
FunctionsAddresses
1
"imped" means "impedance".
2
Mapping of registers in LBA mode
X = does not matter which signal is asserted
N = signal negated
A = signal assertedLogic conventions:
Figure 58. Register Set
Communication to or from the device is through an I/ O Register that routes the input or output data to or
from registers addressed by the signals from the host (CS0
–
, CS1
–
, DA2, DA1, DA0, DIOR
–
and
DIOW
–
).
The Command Block Registers are used for sending commands to the device or posting status from the
device.
The Control Block Registers are used for device control and to post alternate status.
Deskstar 60 GXP Hard disk drive specification
67