IBM Series 1 - Page 33

PROCESSOR I/O CHANNEL OPERATIONAL CHARACTERISTICS
Operations on the processor I/O channel are performed by the
follovin~ major signal sequences utilizing either the
service group, the poll group, or a combination of both.
• DPe sequence (service group)--a write or read transfer
initiated by an Operate I/O instruction. The sequence
terainates after one byte or one word is transferred.
• Interrupt service sequence {service group)--initiated
by a poll capture following an interrupt request from
an I/O device. The sequence is terminated after the
interrupt 10 word is transferred.
• Cycle steal service sequence (service group)--an input
or output transfer initiated by a poll capture after a
cycle steal request from the I/O device. The sequence
terminates after one byte- or vord-transfer unless
burst mode is active.
•
Poll sequence (poll group)--initiated by either an
interrupt request or a cycle steal request. The poll
is either propagated or captured by an I/O device. If
the poll is captured, the I/O device returns a poll
return tag for either (1) capture of an interrupt poll
or (2) for a single cycle steal transfer.' The device
returns the burst return tag for multiple cycle steal
transfers.
• Processor initiated IPL sequence {service and poll
group)--initiated when the Load key on the console is
pressed. The sequence terminates when the I/O device
has transferred the complete IPL record.
• Host initiated IPL sequence (service and poll
groups)--initiated by a signal from the I/O attachment
that connects the I/O channel to the host processor.
The sequence terminates when the complete IPL record
has been transferred.
• Reset sequences--(1) initiated by the halt I/O or MCHK
tag when a halt I/O command is issued or when a machine
check interrupt occurs, or (2) initiated when the
system reset key on the console is pressed.
The service and poll groups operate concurrently and
asynchronously to each other. This characteristic is a
major operational and design consideration. However, some
of the sequences occurring on the I/O channel are
interdependent. Figure 2-7 is a block diagram illustrating
the architectural interdependencies of the major channel
sequences from the viewpoint of a group of devices in normal
operation. This diagram does not attempt to show contention
2-18 GA34-0033