iHome SDIO Card User Manual

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SD Specifications

Part E1

SDIO Simplified Specification

Version 2.00

February 8, 2007

Technical Committee

SD Card Association

Table of Contents

Default Chapter2
- Revision History2
- Conventions Used in this Document4
- Table of Contents5
1 General Description10
- SDIO Features10
- Primary Reference Document10
- Standard SDIO Functions10
2 SDIO Signaling Definition11
- SDIO Card Types11
- SDIO Card Modes11
- SDIO Host Modes11
- Signal Pins12
- Figure 2-1 Signal Connection to Two 4-Bit SDIO Cards12
3 SDIO Card Initialization13
- Differences in I/O Card Initialization13
- Figure 3-1 SDIO Response to Non-I/O Aware Initialization13
- Figure 3-2 Card Initialization Flow in SD Mode (SDIO Aware Host)16
- Figure 3-3 Card Initialization Flow in SPI Mode (SDIO Aware Host)18
- The IO_SEND_OP_COND Command (CMD5)19
- Table 3-1 OCR Values for CMD519
- Figure 3-4 IO_SEND_OP_COND Command (CMD5)19
- The IO_SEND_OP_COND Response (R4)20
- Figure 3-5 Response R4 in SD Mode20
- Figure 3-6 Response R4 in SPI Mode20
- Figure 3-7 Modified R1 Response20
- Special Initialization Considerations for Combo Cards21
4 Differences with SD Memory Specification24
- SDIO Command List24
- Unsupported SD Memory Commands24
- Modified R6 Response25
- Reset for SDIO25
- Bus Width25
- Table 4-1 Unsupported SD Memory Commands25
- Table 4-2 R6 Response to CMD325
- Table 4-3 SDIO R6 Status Bits25
- Card Detect Resistor26
- Timings26
- Table 4-4 Combo Card 4-Bit Control26
- Table 4-5 Card Detect Resistor States26
- Table 4-6 Is Blanked26
- Data Transfer Block Sizes27
- Data Transfer Abort27
  - Read Abort27
  - Write Abort27
- Changes to SD Memory Fixed Registers27
5 New I/O Read/Write Commands30
- IO_RW_DIRECT Command (CMD52)30
- Figure 5-1 IO_RW_DIRECT Command30
- IO_RW_DIRECT Response (R5)31
- IO_RW_EXTENDED Command (CMD53)33
6 SDIO Card Internal Operation35
- Overview35
- Register Access Time35
- Interrupts35
- Suspend/Resume36
- Read Wait36
- CMD52 During Data Transfer36
- SDIO Fixed Internal Map36
- Common I/O Area (CIA)37
- Card Common Control Registers (CCCR)37
- Figure 6-1 SDIO Internal Map37
- Table 6-1 Card Common Control Registers (CCCR)38
- Table 6-2 CCCR Bit Definitions43
- Function Basic Registers (FBR)44
- Table 6-3 Function Basic Information Registers (FBR)44
- Table 6-4 FBR Bit and Field Definitions45
- Card Information Structure (CIS)46
- Multiple Function SDIO Cards46
- Setting Block Size with CMD5346
- Table 6-5 Card Information Structure (CIS) and Reserved Area of CIA46
- Bus State Diagram47
- Figure 6-2 State Diagram for Bus State Machine47
7 Embedded I/O Code Storage Area (CSA)48
- CSA Access48
- CSA Data Format48
8 SDIO Interrupts49
- Interrupt Timing49
9 SDIO Suspend/Resume Operation51
10 SDIO Read Wait Operation52
11 Power Control53
- Power Control Overview53
- Power Control Support for SDIO Cards53
- Power Control Support for the SDIO Host54
12 High-Speed Mode56
- SDIO High-Speed Mode56
- Switching Bus Speed Mode in a Combo Card56
13 SDIO Physical Properties57
- SDIO Form Factors57
- Full-Size SDIO57
- Minisdio57
14 SDIO Power57
- SDIO Card Initialization Voltages57
- SDIO Power Consumption57
15 Inrush Current Limiting59
16 CIS Formats60
- CIS Reference Document60
- Basic Tuple Format and Tuple Chain Structure60
- Byte Order Within Tuples60
- Table 16-1 Basic Tuple Format60
- Tuple Version61
- SDIO Card Metaformat61
- Table 16-2 Tuples Supported by SDIO Cards61
- CISTPL_MANFID: Manufacturer Identification String Tuple62
- SDIO Specific Extensions62
Appendix A68
- A.1 SD and SPI Command List68
- Table A-14 SD Mode Command List68
- Table A-15 SPI Mode Command List69
Appendix B70
- B.1 Normative References70
Appendix C C.1 Abbreviations and Terms71
Appendix D73

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iHome SDIO Card Specifications

General

Brand	iHome
Model	SDIO Card
Category	Computer Hardware
Language	English