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Industrial Micro Systems 464 - Configuring the 464 Board; Phantom Line (JACK JD) Configuration; Enable I;O (JACK JB) Setting; I;O Address Selection (JACK JC)

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· --
The
464
board
features
a
parity
circuit
to
provide
increased
data
security.
A
parity
bit
is
written
during
every memory
write
such
that
the
total
number
of
"1"
bits
written
are
odd.
During
memory
reads
the
total
number
of
"1"
bits
are checked.
The
parity
error
is
set
if
the
number
of
"1"
bits
checked
are
even,
Parity
errors
during
memory reads
can
interrupt
or
stop
the
CPU. A LED
r-
indicator
on
the
board
is
lighted
to
indicate
the
error,
The
status
of
the
parity
circuit
may
be
read
J
from
the
memory
board's
I/O
Port.
CONFIGURING
THE
464
BOARD
PHANTOM LINE OACK JO)
The
phantom
signal
(pin
67)
shunt
is
etched
so
that
the
board
will
be
disabled
by
an
activated
Phantom
Line.
this
is
not
desirable,
then
the
etch
connecting
the
two
pads
of
JD (PH) may
be
cut
on
the
rear
of
the
board.
aD
must
be
connected
when
using
the
464
board
with
Industrial
Micro
System
CPU
boards,)
Note:
The
Phantom
Line
affects
memory
read
operations
only.
Memory
write
operations
are
not
affected
by
the
Phantom
Line. . ,
EN
I/O
OACK JB)
-...J
THE
"EN
I/O"
(Enable I/O)
shunt
JB
must
be
installed
for
the
board
to
respond
to
I/O
commands.
This
will
be necessary
for
bank
mode
or
parity
operations.
I/O
SELECTION
OACK
JC)
The
selection
of
the
boards
I/O
address
is
done
on
jack
JC.
The
jack
is
labeled
0-7
(top
to
bottom)
for
the
respective
address
bits
(AO-A7)
of
the
I/O
address.
A
"1"
is
programmed
by remoyin¥ a
shunt.
Thus,
to
program
I/O
address
OFH
the
top
four
shunts
(0-3)
would
be
removed
("l's")
and
.J
the
bottom
four
shunts
(4-7)
would
be
installed
("O's"),
(Note
that
the
liEN
1/0"
shunt
must
be
on
for
the
board
to
respond
to
the
I/O
command.)
CPU
SELECTION
OACK
JF)
, i
The
8080
shunt
(JF)
should
be
installed
for
systems
using
8080
CPU's.
For
2-80
systems
this
shunt
should
be
removed.
FRONT
PANEL OACK JH)
If
the
464
board
is
to
be
used
with
an
"IMSAI"
front
panel,
the
shunt
JH
must
be
in
the
right-most
(FP)
position.
MEMORY
SPEED
OACK JA)
The
JA
shunt
controls
the
timing
of
the
memory
board.
The
H
position
is
for
200NS
RAMS
and
the
L
position
is
for
250NS
RAMS.
This
shunt
is
factory
installed
on
the
H
position
and normally
should
not
be
changed.
High
speed
operation
is
required
for
the
2-80
processor.
INDUSTRIAL
MICRO
SYSTEMS.
INC.
000464
REV A
8/12/80
Page
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