Infineon TRAVEO T2G - 19.3.8 CH 7; 19.4 EPASS_MMIO

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR2_CH6_RESULT
0x409029A4 FULL Result data register
PASS0_SAR2_CH6_GRP_STAT
0x409029A8 FULL Group status register
PASS0_SAR2_CH6_ENABLE
0x409029B8 FULL Enable register
PASS0_SAR2_CH6_TR_CMD
0x409029BC FULL Software triggers
19.3.8 CH 7
Register Name Address Permission Description
PASS0_SAR2_CH7_TR_CTL
0x409029C0 FULL Trigger control.
PASS0_SAR2_CH7_SAMPLE_CTL
0x409029C4 FULL Sample control.
PASS0_SAR2_CH7_POST_CTL
0x409029C8 FULL Post processing control
PASS0_SAR2_CH7_RANGE_CTL
0x409029CC FULL Range thresholds
PASS0_SAR2_CH7_INTR
0x409029D0 FULL Interrupt request register.
PASS0_SAR2_CH7_INTR_SET
0x409029D4 FULL Interrupt set request register
PASS0_SAR2_CH7_INTR_MASK
0x409029D8 FULL Interrupt mask register.
PASS0_SAR2_CH7_INTR_MASKED
0x409029DC FULL Interrupt masked request register
PASS0_SAR2_CH7_WORK
0x409029E0 FULL Working data register
PASS0_SAR2_CH7_RESULT
0x409029E4 FULL Result data register
PASS0_SAR2_CH7_GRP_STAT
0x409029E8 FULL Group status register
PASS0_SAR2_CH7_ENABLE
0x409029F8 FULL Enable register
PASS0_SAR2_CH7_TR_CMD
0x409029FC FULL Software triggers
19.4 EPASS_MMIO
Register Name Address Permission Description
PASS0_PASS_CTL
0x409F0000 FULL PASS control register
PASS0_SAR_TR_IN_SEL0
0x409F0020 FULL per SAR generic input trigger select
PASS0_SAR_TR_IN_SEL1
0x409F0024 FULL per SAR generic input trigger select
PASS0_SAR_TR_IN_SEL2
0x409F0028 FULL per SAR generic input trigger select
PASS0_SAR_TR_OUT_SEL0
0x409F0040 FULL per SAR generic output trigger select
PASS0_SAR_TR_OUT_SEL1
0x409F0044 FULL per SAR generic output trigger select
PASS0_SAR_TR_OUT_SEL2
0x409F0048 FULL per SAR generic output trigger select
PASS0_TEST_CTL
0x409F0080 FULL Test control bits
1088
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers