Infineon TRAVEO T2G - 23.9.10 SCB_UART_TX_CTRL

Technical Reference Manual 002-29852 Rev. *B
23.9.10 SCB_UART_TX_CTRL
Description:
UART transmitter control
Address:
0x40600044
Offset:
0x44
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x2
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] PARITY
_ENABLED
[5:5]
PARITY
[4:4]
None [3:3] STOP_BITS [2:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:9] RETRY_ON
_NACK
[8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:2 STOP_BITS RW R 2 Stop bits. STOP_BITS + 1 is the duration of the stop
period in terms of halve bit periods. Valid range is [1,
7]; i.e. a stop period should last at least one bit period.
4 PARITY RW R 0 Parity bit. When '0', the transmitter generates an even
parity. When '1', the transmitter generates an odd
parity. Only applicable in standard UART and
SmartCard submodes.
5 PARITY_ENABLED RW R 0 Parity generation enabled ('1') or not ('0'). Only
applicable in standard UART submodes. In SmartCard
submode, parity generation is always enabled through
hardware. In IrDA submode, parity generation is
always disabled through hardware
8 RETRY_ON_NACK RW R 0 When '1', a data frame is retransmitted when a
negative acknowledgement is received. Only
applicable to the SmartCard submode.
1399
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers