Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
UP_DOWN 3 Up / Down rotary counting mode. Input phiA
increments the counter, input phiB decrements the
counter. The trigger edge detection settings apply.
INV_OUT 1 When bit 0 is '1',
QUADRATURE_ENCODING_MODE[0] inverts
'dt_line_out' (PWM/PWM_DT modes)
INV_COMPL_OUT 2 When bit 1 is '1',
QUADRATURE_ENCODING_MODE[1] inverts
'dt_line_compl_out' (PWM/PWM_DT modes)
24:26 MODE RW R 0 Counter mode.
TIMER 0 Timer mode
Reserved1 1 N/A
CAPTURE 2 Capture mode
QUAD 3 Quadrature mode
Different encoding modes can be selected by
QUAD_ENCODING_MODE including up/down count
functionality.
Different counter range, reload value and capture
behavior can be selected by QUAD_RANGE_MODE
(overloaded field UP_DOWN_MODE).
PWM 4 Pulse width modulation (PWM) mode
PWM_DT 5 PWM with deadtime insertion mode
PWM_PR 6 Pseudo random pulse width modulation
SR 7 Shift register mode.
30 DBG_FREEZE_EN RW R 0 Specifies the counter behavior in debug mode.
'0': The counter operation continues in debug mode.
'1': The counter operation freezes in debug mode.
31 ENABLED RW R 0 Counter Enable
'0': counter disabled.
'1': counter enabled.
Counter static configuration register fields should only
be modified when the counter is disabled. When a
counter is disabled, command and status information
associated to the counter is cleared by HW, this
includes:
- the associated counter triggers in the CMD register
are set to '0'.
- the counter's interrupt cause fields in counter's INTR
register.
- the counter's status fields in counter's STATUS
register..
- the counter's trigger outputs ('tr_out0' and tr_out1').
- the counter's line outputs ('line_out' and
'line_compl_out').
The following are Counter static configuration
registers:
CTRL (with the exception of DEBUG_FREEZE_EN
bit), DT, TR_IN_SEL0, TR_IN_SEL1,
TR_IN_EDGE_SEL,
TR_PWM_CTRL_TR_OUT_SEL,INTR, INTR_MASK,
INTR_MASKED
Modifying these registers while the counter is running
could produce unexcepted waveform results, but will
not cause a fatal issue such as an illegal stop, lost
control, or waveform stability issues.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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