Infineon TRAVEO T2G - 28.4.1.1.20 TCPWM_GRP_CNT_INTR_SET

Technical Reference Manual 002-29852 Rev. *B
28.4.1.1.20 TCPWM_GRP_CNT_INTR_SET
Description:
Interrupt set request register
Address:
0x40380074
Offset:
0x74
Retention:
Not Retained
IsDeepSleep:
No
Comment:
When read, this register reflects the interrupt request register.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:3] CC1
_MATCH
[2:2]
CC0
_MATCH
[1:1]
TC [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 TC RW1S A 0 Write with '1' to set corresponding bit in interrupt
request register.
1 CC0_MATCH RW1S A 0 Write with '1' to set corresponding bit in interrupt
request register.
2 CC1_MATCH RW1S A 0 Write with '1' to set corresponding bit in interrupt
request register.
1820
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers