Infineon TRAVEO T2G - 7.5.3.16 CXPI_CH_RX_FIFO_RD_SILENT

Technical Reference Manual 002-29852 Rev. *B
7.5.3.16 CXPI_CH_RX_FIFO_RD_SILENT
Description:
RX FIFO silent read
Address:
0x405180AC
Offset:
0xAC
Retention:
Not Retained
IsDeepSleep:
No
Comment:
This register supports a single 32-bit access to read data fields.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 DATA R W Undefined Data read from the RX FIFO. Reading data from this
field would not pop the data from RX FIFO.
This register is for debug purpose.
789
2022-04-18
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