Infineon TRAVEO T2G - 9.3.14 DW_CRC_POL_CTL

Technical Reference Manual 002-29852 Rev. *B
9.3.14 DW_CRC_POL_CTL
Description:
CRC polynomial control
Address:
0x40280120
Offset:
0x120
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name POLYNOMIAL [7:0]
Bits 15 14 13 12 11 10 9 8
Name POLYNOMIAL [15:8]
Bits 23 22 21 20 19 18 17 16
Name POLYNOMIAL [23:16]
Bits 31 30 29 28 27 26 25 24
Name POLYNOMIAL [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 POLYNOMIAL RW R 0 CRC polynomial. The polynomial is represented
WITHOUT the high order bit (this bit is always
assumed '1'). The polynomial should be aligned/shifted
such that the more significant bits (bit 31 and down)
contain the polynomial and the less significant bits (bit
0 and up) contain padding '0's. Some frequently used
polynomials:
- CRC32: POLYNOMIAL is 0x04c11db7 (x^32 + x^26
+ x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7
+ x^5 + x^4 + x^2 + x + 1).
- CRC16: POLYNOMIAL is 0x80050000 (x^16 + x^15
+ x^2 + 1, shifted by 16 bit positions).
- CRC16 CCITT: POLYNOMIAL is 0x10210000 (x^16
+ x^12 + x^5 + 1, shifted by 16 bit positions).
875
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers