Ingenico iWL220 - Memory Capacity; Booster; Data Security; Hardware Design

Technical manual _iWL220/250
ICO_MKP_009_GU_EN_V4
17/60
Copyright © 2010 Ingenico
All rights reserved
CRYPTO CPU (booster)
RISC 32-bits ARM7 processor with flash and RAM memory
Clock frequency
57 MHz
Capacity
50 MIPS
Calendar
Leap-year management
The power of the iWL2xx’s processors gives the following performance:
3DES  less than 10µs.
Algorithm
Keys
RSA
SDA
DDA
1024 exp 3
0,4 ms
1 ms
1,5 ms
1024 exp 2
16
+ 1
3 ms
8 ms
13 ms
2048 exp 3
1,1 ms
3 ms
4,5 ms
2048 exp 2
16
+ 1
9 ms
24 ms
38 ms
2.3.2. Memory capacity
Memory
iWL220
iWL250
Internal SDRAM
16MB up to 32MB
32MB
Internal Flash
16MB up to 128MB
128MB
µSD card reader
Optional
Standard
2.3.3. Booster
The booster is a secured ASIC (crypto processor) including all the secured functions which
protect the device against various attacks.
The booster embedded has an impact on security personalization.
2.3.4. Data security
2.3.4.1. Hardware design
The terminal was designed to be tamper sensitive, in order to preserve the sensitive data
(keys or confidential code) and to delete this data as soon as a tamper attempt is detected.
Tamper detection
Protection against tampering:
By micro switches
By temperature monitoring