Inovance H3U Series - SORT Data Sorting

181
4
4 Instructions 4.5.3 Table Operation
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Additional information
The bit elements Y, M, and S and the word elements T, C, and D can also use the RST instruction for data
reset. The word elements T, C, and D and the bit registers KnY, KnM, and KnS can also use the FMOV
instruction for multi-point data clearance. Example:
SORT: Data sorting
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Overview
When driving conditions are met, the SORT instruction sorts the data in the nth column of a table with m1
rows and m2 columns from head address S in ascending order. The sorting result is stored in a table from
head address D.
SORT S m1 m2 D n
Data sorting Applicable model:
H3U
S
Table
1 head
address
Head address of word elements that store the data of
table 1 (which occupies m1 x m2 points)
16-bit instruction (11
steps)
SORT: Continuous
execution
m1
Table row
count
Number of table rows, or address of the word element that
stores the data
m2
Table
column
count
Number of table columns, or address of the word element
that stores the data
D
Table
2 head
address
Head address of word elements that store the data of
table 2 (which occupies m1 x m2 points)
n
Sorted
column
number
Number of the column whose data will be sorted; value
range: 1 to m2
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Operands
Operand
Bit Element Word Element
System·User System·User Bit Designation Indexed Address Constant
Real
Number
S X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
m1 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
m2 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
D X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
n X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
Note: The elements in gray background are supported.