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Inovance H3U Series - MCMP Matrix Comparison Operation

Inovance H3U Series
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228
4
4 Instructions4.6.2 Matrix Comparison
[D+0]
[D+1]
[D+n-2]
[D+n-1]
...
OFF
ON
ON
OFF
...
[S2+0]
[S2+1]
[S2+n-2]
[S2+n-1]
...
K1111
K-2222
K500
K3333
...
K1111
M8333 is set to ON when all of n results from head address [D] are ON.
An error is returned in the following conditions. The instruction is not executed. The error ag M8067 is set
to ON to identify this error and the error code is stored in D8067.
1. Error 6705 is returned when elements from head addresses [S1], [S2], and [D] are out of range.
2. Error 6705 is returned when 32-bit counters (C200 to C255) are used in 16-bit operation.
3. 32-bit counters are only applicable to 32-bit instructions (such as DBKCMP=, DBKCMP>, and
DBKCMP<).
Application
MCMP: Matrix comparison operation
Overview
The MCMP instruction performs matrix comparison.
MCMP S1 S2 n D
Matrix comparison
operation
Applicable model:
H3U
S1 Matrix 1 Operand element 1 in an operation
16-bit instruction (9
steps)
MCMP: Continuous
execution
MCMPP: Pulse
execution
S2 Matrix 2 Operand element 2 in an operation
n Data count
Number of data entries in an operation; value range:
1 to 256
D Pointer Position number of the current bit

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