Inovance H3U Series - Page 405

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6
6 Positioning and InterpolationDSZR: DOG search return to origin
output (SET M8351 in the preceding gure), the high-speed output driven by M100 stops immediately, the
instruction driven by M200 occupies the high-speed output port Y0, and the set high-speed output starts
immediately.
6) The pulse output complete interrupt is not supported in speed control mode.
7) The pulse output is stopped.
The pulse output can be stopped by setting the "pulse output stop ag bit" of special elements. See the
following table.
Y0 Y1 Y2 Y3 Y4 Attribute
M8349 M8369 M8389 M8409 M8429 Pulse output stop ag
8) Clearing signal is output.
You can set the "clearing signal output valid ag bit" of special elements to output a clearing signal after the
origin is regressed. See the following table.
Y0 Y1 Y2 Y3 Y4 Attribute
M8341 M8361 M8381 M8401 M8421
Valid output label for the DSZR/ZRN and
other clearing signals
The clearing signal is output only through the Y port specied by the clearing elements. See the following
table.
Y0 Y1 Y2 Y3 Y4 Attribute
D8350 D8370 D8390 D8410 D8430 Element number clearing
5 (the default
port is Y5)
6 (the default
port is Y6)
7 (the default
port is Y7)
8 (the default
port is Y10)
9 (the default
port is Y11)
9) Signal logical inversion is shown in the following table.
OFF: Positive logic (when the input is ON, the near point/clearing signal is ON).
ON: Negative logic (when the input is OFF, the near point/clearing signal is ON).
Y0 Y1 Y2 Y3 Y4 Attribute
M8345 M8365 M8385 M8405 M8425
Near point signal logical inversion
(*1)
M8346 M8366 M8386 M8406 M8426 Origin signal logical inversion (*1)
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