Lenze · Decentralised frequency inverter 8400 motec (CANopen option) · EDS84DMOTCAN EN 4.0 - 02/2019 65
Monitoring
Integrated error detection
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10.2 Integrated error detection
If a node detects an error, it rejects the CAN telegram bits received so far and transmits an error flag.
The error flag consists of 6 consecutive bits with the same logic value.
The following errors are detected:
Bit error
The sending node monitors the bus and interrupts the transmission if it receives a different logic
value than the value transmitted. With the next bit, the sending node starts the transmission of an
error flag.
In the arbitration phase, the sender only detects a bit error if a dominantly sent bit is received as a
recessive bit. In the ACK slot as well, the dominant overwriting of a recessive bit is not indicated as
a bit error.
Stuff-bit error
If more than 5 consecutive bits before the ACK delimiter in the CAN telegram have the same logic
value, the previously transmitted telegram will be rejected and an error flag will be sent with the
next bit.
CRC error
If the CRC checksum received does not correspond to the checksum calculated in the CAN chip, the
CAN controller sends an error flag after the ACK delimiter, and the previously transmitted telegram
is invalidated.
Acknowledgement error
If the ACK slot which is sent recessively by the transmitting node is not overwritten dominantly by
a receiver, the transmitting node aborts the transmission. The transmitting node invalidates the
telegram transmitted and sends an error flag with the next bit.
Format error
If a dominant bit is detected in the CRC delimiter, in the ACK delimiter or in the first 6 bits of the EOF
field, the telegram received is rejected and an error flag is sent with the next bit.
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