LG 32LJ51-ZA Series - Page 10

- 10 -
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Only for training and service purposes.
IC101
Main SOC
(P1801)
30P HD LVDS wafer
51P FHD LVDS wafer
(P1800)
COMP2_Y+/Pb+/Pr+/L_R_IN or AV_CVBS_IN/L_R_IN
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2
DDC_SCL/SDA_2, HDMI_CEC
Serial Flash
(IC1300)
SPI_SCK/SDI/SDO/CS
System EEPROM
(IC104)
I2C_SCL/SDA
RXA0+/-~RXA4+/-, RXACK+/- RXB0+/-~RXB4+/-, RXBCK+/-
AGP
SPK_R
SPK_L
AMP_SCL/SDA
AUD_LRCH,
AUD_LRCK, AUD_SCK
Audio AMP
(IC5600)
Connector
(P5601)
HDMI1
(JK800)
USB
(JK700)
DM/DP
USB1_OCP/CTL
DC-DC, OCP
(IC400)
+5V_USB
NAND FLASH
(IC102)
PCM_A[0:7]
Buffer
IC1902
TS_DATA[0:7] PCM_DATA[0:7]
EPHY_TP/TN/RP/RN
LAN
(JK2100)
Only UK
COMPONENT
(JK2601)
PCM_A[8:14]
X-tal
TU_SCL / SDA
Tuner
(TU3703)
IF_N, IF_P, IP_S, IM_S, QM_S, QP_S
IF_AGC_S, IF_AGC
LNB_OUT
CI SLOT
(P1900)
REAR
SIDE
TU_CVBS, SIF
DEMOD_SCL/SDA
LNB
(IC2701)
LNB_OUT
HDMI2
(JK801)
SPDIF
Jack
SPDIF
(JK1001)
Only EU
SPDIF_OUT
One KEY, LED_R, IR, I2C_Sensor
CK+/-, D0+/-, D1+/-, D2+/-_HDMI4
DDC_SCL/SDA_4, HDMI_CEC
BLOCK DIAGRAM
1.EU/CIS : T2/C/S2 : LJ51_V/U: LD76H