LG 47SL9000 - Page 15

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 15 -
BLOCK DIAGRAM
1. T-project
74L
Module
I2C
Chip Tuner
BUF_TS_CLK/ERR/SYN/DATA[0]
LVC541A
Buffer
CI Sl o
FE_TS_DATA[0:7]
CI MDI[0 ]
CI_TS_DATA[0:7]
CI_Data[0:7] PCM_D[0:7] PCM_A[8:14]
Serial Flash
For Boot
FRC
LGE7329
(XC5000)
Demodulator
(DRC3931)
LVDS
SPI_CK/CS/D0/D1
ot
FE VMAIN
CI
_
MDI[0
:
7
]
DDR2 SDRAM
(1GB)
HYNIX
SDDR_D[0:15] TDDR_D[0:15] SDDR_A[0:12] TDDR_A[0:12]
74LCX244
Buffer
PCM_A[0:7]
CI_ADDR[0:7]
DDR2 SDRAM
(512MB)
HYNIX
Mstar
F- SCART
SC1_CVBS_IN
SC2 CVBS IN
_
H- SCART
SC1_R/G/B FE_ VOUT
DTV/MNT_VOUT
NAND Flash
HYNIX
(64MB)
PCM_A[0:7]
EEP ROM
AT24C512
I2C
Saturn 6
MSD3368
COMPONENT
AV3
AV_CVBS_IN COMP_Y/Pb/Pr
__
Side AV
Digital amp
(NTP3100L)
I2S
L/ R
RGB
DSUB_ R/G/B
DSUB_H/VSYNC
AUDIO IN (PC)
USB
MP6211DH
USB Power
USB Power
USB1_DM/ DP
AUDIO Out (Head Phone)
Audio
AUDIO Out(B/T Headset)
MAX3232CDR
DGB_TX/RX
HDMI 1/2/ 3
TMDS351PAGR
TMDS[0:7]
HDMI CEC
USB0_DM/DP
HDMI 4 Side
RS-232C
TMDS[0:7]
HPD, 5V_HDMI
Switch
SPDIF
SPDIF_OUT
1/2/ 3 Rear : 3
A
_
HPD 5V_HDMI