LG 50LN54 Series - Page 16

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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LVDS
(FHD/50Hz)
SPK L/R
FPC(51P)
AUD_MASTER_CLK,
AUD_LRCH,
AUD_LRCK, AUD_SCK
SPI
CONTROL
IR & LED /
(TACT SWITCH)
LED_R
KEY1
KEY2
IR
I2C
SERIAL FLASH
IC1300 (8M bit)
MX25L8005M2I
EEPROM 256Kbit
IC104
R1EX2425BSAS0A
NAND FLASH
IC102 (1Gbit)
K9F1G08U0D-SCB0
PCM_A[0:7]
CI Slot
TC74LCX244FT Buffer
TS_DATA[0:7]
PCM_DATA[0:7]
FE_TS_DATA[0:7]
PCM_A[8:14]
SPDIF
Component1
USB
DP/DM
SPDIF
CVBS, Y/Pb/Pr, L/R
R ear
Side
F-SCART
SC1_CVBS_IN
SC1_R/G/B
FE_ VOUT
TMDS
HDMI1
TMDS
HDMI2 With MHL
LAN
EPHY
H/P
H/P L/R
TDSQ- G501D(B)
(LGIT)
AIF, DIF
SIF
X- tal
24M
LNB
A8303SESTR-T
(IC2701)
LNB OUT
FE_TS
AIR/Cable
Seattleite
DDR3 Add. DDR3 Data
DDR3 1Gb
IC1201
H5TQ1G63EFR -PBC
DDR3 1Gb
IC1202
H5TQ1G63EFR -PBC
Audio AMP
STA380BWF
S7LR-M
(LGE2121 -MS)
IC101
Only for 3D
DDR3 2Gb
IC1201
H5TQ2G63DFR - PBC
2D Model
- LN54*S, LN54*R LN54*6, LN54*5, LA61*S, LA61*6
BLOCK DIAGRAM
1. [LD31B] DVB-T/C/S2(2D/3D)