LG 55LM960Y - Page 67

* FHD 240Hz T480Hz ( 72LM9500)
4. Block Diagram for High-end models(Back-end)
DDR3 SDRAM
- 1Gbit (x16)
- 800MHz
DDR3 SDRAM
- 1Gbit (x16)
- 800MHz
DDR1_DATA[15:0]
DDR1_A[13:0]/
BA[2:0]/CLK/CKE
DDR0_DATA[15:0]
DDR0_A[14:0] /
BA[2:0]/CLK/CKE
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+2.5V
SPI_DO/CK/CS
SPI_DI
SPI FLASH
(32Mbit)
SPI FLASH
(32Mbit)
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
L/DIM0_VS,
L/DIM0_SCLK/MOSI
DDR3 SDRAM
- 1Gbit (x16)
- 800MHz
DDR3 SDRAM
- 1Gbit (x16)
- 800MHz
FRC-III
(LG1122)
(0x1C, direct
0xB2, in-direct)
XTAL_IN
XTAL_OUT
X-Tal
(24.75Mhz)
LG1121_RESET
8Lane Vx1 HS
Dual-Link HS-LVDS
VLCD_POWER
(+12V)
LG1121__RESET
I2C_SDA_S
I2C_SCL_S
PMIC
(MAX17139)
PMIC
(MAX17139)
VCC/VDD/
VGH_A/VGL/
HVDD/VCORE
VLCD_POWER(+12V)
I2C_SDA_S
I2C_SCL_S
L/DIM0_VS
L/DIM0_MOSI/SCLK
I2C_SDA_S
I2C_SCL_S
+1.8V
VLCD_POWER(+12V)
VLCD_POWER(+12V)
* Epoxy 4Layer 1.2T (206x183mm)
TX_LOCK
GMA[4:1] /
GMA[14:10]
VCC/VDD
P-GAMMA
IC – Master1 (BUF06830)
P-GAMMA
IC – Master1 (BUF06830)
VCOM
I2C_SDA_S
I2C_SCL_S
VCC/VDD
GMA_M[9:5] /
GMA_M[18:15]
P-GAMMA
IC – Master2 (BUF06830)
P-GAMMA
IC – Master2 (BUF06830)
I2C_SDA_S
I2C_SCL_S
80P mini-LVDS Output
RIGHT
LGE 240Hz
T-Con
(LG5812, 0x70)
OPT_N/OPT_P/
GSP/GSC/GOE
VDD/VCC/ HVDD/ VGL/VGH/ VCOMR/ GMA[18:1]
VCOMRFB
VDD/VCC/ HVDD/ VGL/VGH/ VCOM/
GMA[18:1]
VCOMLFB
TCON_SDA TCON_SCL
EEPROM
(AT24C32D,
32Kbit)
EEPROM
(AT24C32D,
32Kbit)
I2C_SDA_S I2C_SCL_S
80P mini-LVDS Output
LEFT
OPT_NN/OPT_P/
SOE/POL/
H_CONV/ GSC/GOE
OPT_N/ SOE/POL H_CONV/GSC/GOE
HF mini-LVDS (2-Link)
HF mini-LVDS (2-Link)
[S]
TCON_SDA TCON_SCL
[M]
80P mini-LVDS Output
RIGHT
LGE 240Hz
T-Con
(LG5812,
0x70)
OPT_N/OPT_P/
GSP/GSC/GOE
VDD/VCC/ HVDD/ VGL/VGH/ VCOMR/ GMA[18:1]
VCOMRFB
VDD/VCC/ HVDD/ VGL/VGH/ VCOM/
GMA[18:1 ]
VCOMLFB
TCON_SDA
TCON_SCL
EEPROM
(AT24C32D,
32Kbit)
EEPROM
(AT24C32D,
32Kbit)
I2C_SDA_S
I2C_SCL_S
80P mini-LVDS Output
LEFT
OPT_NN/OPT_P/
SOE/POL/
H_CONV/ GSC/GOE
OPT_N/ SOE/POL H_CONV/GSC/GOE
HF mini-LVDS (2-Link)
HF mini-LVDS (2-Link)
[S]
TCON_SDA TCON_SCL
[M]
GMA[4:1] /
GMA[14:10]
VCC/VDD
P-GAMMA
IC – Master1 (BUF06830)
P-GAMMA
IC – Master1 (BUF06830)
VCOM
I2C_SDA_S
I2C_SCL_S
VCC/VDD
GMA_M[9:5] /
GMA_M[18:15]
P-GAMMA
IC – Master2 (BUF06830)
P-GAMMA
IC – Master2 (BUF06830)
I2C_SDA_S
I2C_SCL_S
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+1.5V
+3.3V
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
VLCD_POWER(+12V)
PMIC
(MAX17139)
PMIC
(MAX17139)
VCC/VDD/
VGH_A/VGL/
HVDD/VCORE
VLCD_POWER(+12V)
I2C_SDA_S
I2C_SCL_S
+0.9V
DC-DC Con
(AOZ1038PI)
DC-DC Con
(AOZ1038PI)
VLCD_POWER(+12V)
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+1.8V
VLCD_POWER(+12V)
VLCD_POWER(+12V)
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
I2C HUB
(PCA9516)
I2C HUB
(PCA9516)
I2C_EN_M
I2C_EN_S
I2C_SDA_1
I2C_SCL_1
I2C_SDA_2
I2C_SCL_2
I2C_SDA_S
I2C_SCL_S
8Lane Vx1 HS8Lane Vx1 HS
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Only for training and service purposes
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