LG D686 - Page 154

- 154 -
Copyright © 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
+3V0_SENSORS_MTK
+1V8_VIO_MTK
U804
L12
N6 N8 N7 L13 L14 K9 N11 M10 N12 N13 N14 M13 E5 E9 F6 E2 D1 C11 C6 C5 E8 C7 N9 H13 K14 J14 H14 G14 C13 B14 B13 A14 E14 E13
H3
J5
K2
J2
E7
G5
G3
B6
A5
B5
A7
F3
F2
B8
B11
B7
A11
C10
C8
A8
B9
E3
F5
E1
B10
C9
A10
D12
H12
C12
K13
J13
A13
G13
G12
E10
D14
D13
C14
B12
E12
F13
F12
K5
G2
G1
E6
A3
B1
C3
B2
C4
C1
B3
D2
D3
A4
B4
M3
M4
N2
L2
A2
L3
K3
M2
J3
K1
H2
H1
L1
H5
N1
P11
P10
P12
P13
M5
P3
P2
N4
N3
N5
P5
P7
P8
P14
H6 K8 J7 H7 G7 M6 K6 M7 K7 M9 M8
K10 M11 M12
P1 A1 J6 G6 F7
K12 J12 J10
J9 J8
H10
H9 H8
G10
G9 G8
F10
F9 F8
GND_VPROC_1 GND_VPROC_2 GND_VPROC_3 GND_VCORE_1 GND_VCORE_2 GND_VCORE_3 GND_VCORE_4 GND_VIO18_1 GND_VIO18_2 GND_VIO18_3 GND_VRF18_1 GND_VRF18_2 GND_VPA_1 GND_VPA_2 GND_LDO_1 GND_LDO_2 GND_LDO_3 BGA_NC-A1 BGA_NC-P1 GND_DRV1 GND_ISINK_1 GND_ISINK_2 GND_SPK1_1 GND_SPK1_2 GND_SPK2_1 GND_SPK2_2 GND_LDO_4 GND_LDO_5 GND_LDO_6 GND_LDO_7 GND_LDO_8 GND_LDO_9 GND_LDO_10 BGA_NC-P14
VBAT_SPK1
VBAT_SPK2
VBI_P
VBI_N
AUD1_P
AUD1_N
AUD2_P
AUD2_N
BYPASS
SPK1_P
SPK1_N
SPK2_P
SPK2_N
VCDT
CHR_LDO
VDRV
ISENSE
BATSNS
BATON
TREF
PCH_DET
USB_DLN
USB_DLP
SRCLKEN
RESETB
PWRKEY
PMU_TESTMODE
PWRBB
SYSRSTB
FSOURCE
SCK
SDA
INT
DVS1
DVS2
PA_SEL0
PA_SEL1
PA_SEL2
BL_PWM
HOMEKEY
CS+
CS-
32K_IN
VCORE_1
VCORE_2
VCORE_3
VCORE_FB
VPROC_1
VPROC_2
VPROC_3
VPROC_FB
VIO18_1
VIO18_2
VIO18_FB
VPA_1
VPA_2
VPA_FB
VRF18
VRF18_FB
VM12_1
VM12_2
VM12_INT
VRF28
VTCXO
VA1
VIO28
VSIM
VSIM2
VMC
VMCH
VGP
VGP2
VUSB
VCAMA
VCAMA_S
VCAM_AF
VCAMD
VCAM_IO
VIBR
VA2
VA2_BUF
VRTC
VRET
GND_VREF
CHG_DP
CHG_DM
VBAT_VCORE_1 VBAT_VCORE_2 VBAT_VPROC_1 VBAT_VPROC_2 VBAT_VPROC_3 VBAT_VPROC_4
VBAT_VIO18_1 VBAT_VIO18_2
VBAT_VPA_1 VBAT_VPA_2
VBAT_VRF18
VBAT_MISC
VBAT_LDO2_1 VBAT_LDO2_2 VBAT_LDO3_1 VBAT_LDO3_2
VBAT_LDO4
VBAT_LDO5_1 VBAT_LDO5_2
AVDD18_IO
AVDD18
AVDD18_DIG
ISINK0 ISINK1 ISINK2 ISINK3 ISINK4 ISINK5
BST_GDRV
KPLED
FLASH
ASW_IN1 ASW_IN2
ASW_OUT
GND_DRV2
0R320
2
1
2.2uL302
100n
C315
1
2
C313 2.2u
1
2
100nC314
1
2
+1V2_VLPDDR2_MTK
C304 100n
1
2
10nC302
1
2
200K R303
2
1
+1V2_VLPDDR2_MTK
2.2u
C303
1
2
TP301
1
+1V8_VIO_MTK
200K R304
2
1
R306
10K
2
1
47K
R310
2
1
47K
R314
2
1
47K
R313
2
1
47K
R312
2
1
47K
R311
2
1
R309
47K
2
1
47K
R308
2
1
47K
R307
2
1
100nC319
1
2
C306
1u
1
2
+1V8_VIO_MTK
1u
C318
1
2
C310 0.1u
1
2
0.1uC309
1
2
100nC316
1
2
C317 2.2u
1
2
4.7uC339
1
2
C312 4.7u
100K
R301
2
1
4.7uL304
+3V3_eMMC_MTK
C307 4.7u
C336 4.7u
1
2
C333
4.7u
1
2
4.7u
C332
1
2
L303 2.2u
R318 3.3K
C3251u
1
2
C3261u
1
2
C327
1u
1
2
1u C328
1
2
C311
1u
1
2
1u
C331
1
2
C340 1u
1
2
330kR317
C3222.2u
1
2
C3232.2u
1
2
2.2u
C338
1
2
C334 10n
1
2
10u C321 10u C320
D301
1
2
10nC301
1
2
C305 100n
1
2
1u C329
1
2
C3242.2u
1
2
C335 1u
1M
R322
2
1
+1V8_VIO_MTK
1uC330
1
2
47KR323
2
1
100
R321
2
1
U301
A5
A8
B2
K3
M9
J1
L1
T2
U5
B8
F10
F7
G5
H9
J10
L6
M6
N6
R10
T9
V7
V10
E5
G2
K1
M7
U2
W5
E6
F1
V1
W6
B5
C5
C1
B4
A4
A6
B6
A7
B7
B3
A3
L2
P2
P1
N2
N1
M3
L3
F3
G3
H2
H3
J3
J2
K2
R1
R2
R3
T3
U3
H7
T7
L5
N5
G8
G9
U8
U9
K6
K5
P6
P5
K8
K9
P9
P8
P7
R6
E7
G6
R9
E8
G7
E9
F8
H6
T6
V8
W9
U7
R7
T5
W8
U6
W7
H8
J8
J7
J9
J6
K7
R8
T8
H5
Y10
Y9 Y2 Y1 W1
W10 E10 B10
B1
A10
A9 A2 A1 W3 W2 V3 P3 N3 M2 E3 E2 D6 D5 D4 D3 D2 D1 C6 C4 C2
E1
B9
T1
M1
H1
V5
V2
U1
M8
F2
F5
G1
R5
V9
V6
U10
T10
P10
M5
K10
J5
H10
G10
F9
F6
C3
VSSQM
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ9
VSS3
VSS2
VSS1
VSS4
VSS5
VSS6
VSS7
VSSCA1
VSSCA2
VSSCA3
VSSM1
VSSM2
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC13 NC14 NC15 NC16 NC17 NC18 DNU1 DNU2 DNU3 DNU4 DNU5 DNU6 DNU7 DNU8 DNU9 DNU10 DNU11 DNU12 DNU13
DQ28
DQ0
DQ1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ2
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ29
DQ3
DQ30
DQ31
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DM0
DM1
DM2
DM3
CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
ZQ
NC12
CLK_C
CLK_T
CKE0
CKE1
CS0_N
CS1_N
VSS8
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
RST
CMD
CLKM
VDD1_4
VDD1_3
VDD1_2
VDD1_1
VDD2_6
VDD2_5
VDD2_4
VDD2_3
VDD2_2
VDD2_1
VDDQ13
VDDQ12
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ1
VDDQ2
VCCQ
VDDQ11
VDDCA3
VDDCA2
VDDCA1
VREFDQ
VREFCA
VCC2
VCC1
VDDI
C342
1u
1
2
240R315
2
1
L305 2.2u
2
1
R319
51K
2
1
C337
2.2u
1
2
R305
27
2
1
R302
47K
2
1
L301 2.2u
+2V85_VRF_MTK
+2V85_VRF_MTK
+2V8_VTCXO_MTK
+3V4_VWPAM_MTK
+1V8_VIO_MTK
+1V8_VIO_MTK
+1V8_VIO_MTK
SCL_2
SDA_2
RESET_IN
WATCHDOG_RESET
PMUCTRL0
BBWAKEUP
PMUCTRL1
PMU_INT
SRCLKENA
PACTRL2
PACTRL0
PACTRL1
CHD_DP
CHD_DM
+3V0_VSIM2_MTK
+2V8_VIO_MTK
eMMC_CLK
eMMC_RST
+3V0_VSIM_MTK
DDRAM_DQM_[2]
DDRAM_DQM_[1]
DDRAM_DQM_[3]
DDRAM_DQS_[0]_P
DDRAM_DQS_[1]_P
DDRAM_DQS_[2]_P
DDRAM_DQS_[3]_N
DDRAM_DQS_[2]_N
DDRAM_DATA_[19]
DDRAM_DATA_[18]
DDRAM_DATA_[17]
DDRAM_DATA_[16]
DDRAM_DATA_[15]
DDRAM_DATA_[14]
DDRAM_DATA_[13]
DDRAM_DATA_[12]
DDRAM_DATA_[11]
DDRAM_DATA_[10]
+3V3_MICRO_IO
+2V8_VRTC_MTK
DDRAM_CS_[1]_N
DDRAM_DQM_[0]
DDRAM_CLK_N
DDRAM_CLK_P
DDRAM_CS_[0]_N
DDRAM_ADDRESS_[0]
DDRAM_ADDRESS_[1]
DDRAM_ADDRESS_[2]
DDRAM_ADDRESS_[3]
DDRAM_ADDRESS_[4]
DDRAM_ADDRESS_[5]
DDRAM_ADDRESS_[6]
DDRAM_ADDRESS_[7]
DDRAM_ADDRESS_[8]
DDRAM_ADDRESS_[9]
DDRAM_DATA_[9]
DDRAM_DATA_[1]
DDRAM_DATA_[29]
DDRAM_DATA_[28]
DDRAM_DATA_[27]
DDRAM_DATA_[26]
DDRAM_DATA_[25]
DDRAM_DATA_[24]
DDRAM_DATA_[23]
DDRAM_DATA_[22]
DDRAM_DATA_[21]
DDRAM_DATA_[20]
DDRAM_DATA_[8]
DDRAM_DATA_[7]
DDRAM_DATA_[6]
DDRAM_DATA_[5]
DDRAM_DATA_[4]
DDRAM_DATA_[3]
DDRAM_DATA_[2]
DDRAM_DATA_[30]
DDRAM_DATA_[31]
DDRAM_DQS_[3]_P
DDRAM_DQS_[0]_N
DDRAM_DQS_[1]_N
+2V5_AVDD1_MTK
+3V3_USB_MTK
+1V2_CORE_MTK
+1V2_VM12_INT_MTK
+1V35_PROC_MTK
+1V2_VLPDDR2_MTK
+1V2_VLPDDR2_MTK
VBATT
VBATT
VBATT
VBATT
+3V3_eMMC_MTK
DDRAM_CLK_EN
DDRAM_DATA_[0]
+1V8_VRF_MTK
RTCCLK_D
eMMC_CMD
PWR_ON_SW_N
VTREF
PCB_REVISION
eMMC_DATA[0]
eMMC_DATA[1]
eMMC_DATA[2]
eMMC_DATA[3]
eMMC_DATA[4]
eMMC_DATA[6]
eMMC_DATA[5]
eMMC_DATA[7]
+0V6_VREF
+0V6_VREF
VAPROC_FB
+2V5_AVDD2_MTK
AVDD18_DIG
AVDD18_DIG
BATT_TEMP_ADC
VCHG_LDO_4V9
+3V0_TOUCH_MTK
+3V0_LCD_VCI_MTK
+1V8_LCD_VIO_MTK
+3V0_VIBR_MTK
FGN_IC
+3V3_MICRO_SD
2.035714
1.425
0.911224
0.605906
0.457053
0.305357
R2
ADC
ADC Value[V]
100K
47K
27K
19.1K
12K
5.6K
R2
100K
R1
1.2
1.1
1.0
C
B
A
EVB
Revision
PCB Revision
100K
100K
100K
100K
100K
100K
250K
R1
3.3V,100mA
1.8-2.8V,2mA
2.5/2.8V,100mA
1.3-3.3V,100mA
1.3-3.3V,300mA
1.3-3.3V,200mA
1.5-2.8V,200mA
1.3-3.3V,100mA
1.3-3.3V,400mA
1.3-3.3V,200mA
1.3-3.3V,100mA
1.8/3.0V,100mA
2.8V,100mA
1.8-2.5V,100mA
2.8V,40mA
2.85V,200mA
1.2V,360mA
0.9-1.2V,300mA
1.2V,300mA
Seperate DC-DC GND to Main GND
1%
1%
1.3-3.3V,200mA
1.3-3.3V,100mA
[8GB eMMC_8Gb LPDDR2] FOR V5
FOR PI TEST
0.151136
REV 1.0