LG P7200 - Page 109

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4
Memory(INTEL, 256Mbit FLASH/64Mbit pSRAM)
Notice No.
Checked
F
05.08.01
12
DRAWING
10
DRAWING
11
F
Sheet/Sheets
NO.
H.J. KIM
B
1 5
(2125)
6
Headset jack
9
H
MODEL
E
3
7
21
G
C
Layout Comment : Capacitors should be placed near to the microphone.
Approved
(HOOK_DETECT)
11
10
Date
Sign & Name
H
D
Name
7
E
Date
(MP3_REW)
B
LG Electronics Inc.
NAME
LGIC(42)-A-5505-10:01
6
Close to SPEAKER
64POLY MIDI
Section
A
2/6
VER 1.1
MEMORY, MIDI,MIC, Ear Mic
P7200
12
(MP3_FF)
LG Electronics Inc.
2 4
(1608)
MICROPHONE
(MP3_PLAY/PAUSE)
3
Designer
G
9
A
5
D
8
C
Iss.
8
(2125)
0.1u
C227
R230
100K
1000pC212
VA204
EVLC14S02050
R227
2.2K
3V0_VOD
C206
0.022u
33uC244
470p
C249
1u
2V8_VMEM
C210
3.3
R213
VA215
EVLC18S02015
SPOUT2L
B8
SPOUT2R
H8
A6
SPVDDL SPVDDR
J6
SPVSSL
A7 H7
SPVSSR1 SPVSSR2
J7
TXOUT
E8
F7
VREF
H3
_CS
D4
_IRQ
_RD
H4
B4
_RST
J2
_WR
D8
HPVSS
H1
IOVDD1 IOVDD2
B3
LDE1_GPIO4
C2
C3
LED0
B1
LED2_GPIO5
LRCK
D3
MTR
B2
A1
NC1 NC2
A8
NC3
J1
PLLC
H5 C6
RXIN
D1
SDI
SPOUT1L
B7
J8
SPOUT1R
B5
EQ1L
EQ1R
J5
EQ2L
A4 G6
EQ2R
A5
EQ3L
EQ3R
H6
EXC
G7
EXTIN
B6
D7
EXTOUT
GPIO0
D6
GPIO1
C5
C1
GPIO2
C4
GPIO3
HPC
F6
HPOUTL
C8
HPOUTR
C7
BLCK
D2
G5
CLKI
D0
H2 G3
D1 D2
G2 F3
D3 D4
G1 F2
D5 D6
E3 E2
D7
J4
DVDD1
A2
DVDD2 DVDD3
F1
DVSS1
J3
A3
DVSS2
E1
DVSS3
YMU787
U201
A0
G4
G8
AVDD AVSS
F8
BBL
E6
E7
BBR
0.1u
R210
33K
C226
MIDI_IRQ
39p
C238
R211
2V8_VMEM
3.3K
0.1u
C236
47p
1V8_VOD
C216
L204 27nH
R240 100
0
2V8_VMEM
R222
EVL5M02200
VA306
EVL5M02200
1u
3V0_VOD
VA212
C246
C209
220p
R203
68K
0.1u
C232
47p
C248
R233
0
1u
C229
R207
0
VA207
EVLC18S02015
2V8_VMEM
L_SPK_N
R216
0
C233
R218
0.1u
EVLC18S02015
VA214
3.3
VA208
EVL5M02200
C237
10u
L_SPK_P
A1
NO1
C4
NO2
A4
V+
B4
EVL5M02200
VA209
MAX4684EBC_T
U202
COM1
C3
COM2
A3
GND
B1
IN1
C2
IN2
A2
NC1
C1
NC2
120p
C201
0.1u
C239
47p
C218
0
100K
R226
C222
100R236
0.1u
C224
68K
R204
30KR208
0.1uC204
VA309
EVL5M02200
VA307
EVL5M02200
100K
R223
C240
0.1u
R205 30K
C251
47p
C250
47p
NAR228
4.7R235
C207
100R238
0.022u
R225
100K
NAR220
C230
1u
100R237
C234
1u
C242
0.1u 0.1u
C243
120p
C202
NA
R234 4.7
C213
27nHL202
22u
2V5_VMIC
27nHL206
C228
L200 27nH
C219
47p
1K
R224
C247
1u
100
R231
EVLC14S02050
VA205
2V8_VMEM
NA
R217
C211
EVL5M02200
VA211
0.1u
1V8_VCORE
R201
68K
VA210
EVL5M02200
1u
C225
14
15
16
2
3
4
5
6
7
8
9
0.1u
C241
CN201
1
10
11
12
13
VA308
EVL5M02200
2V5_VMIC
R_SPK_P
R202
68K
C217
47p
2.2K
R232
33u
0.1u
C245
33K
C223
R209
J1
_WE
F5
E4
_WP
C214
0
L7
VSS8
L8
WAIT
G7
_ADV
E5
_CE1
K1
_CE2
G8
_CE3
K3
J2
_OE1
_OE2
H8
_P1_CS
D6
_P2_CS
K2
_RST
F4
C2
_R_LB
H1
_R_OE
_R_UB
F3
D5
_R_WE
_S_CS1
C5
S_VCC
K4
VCC11
B5
VCC12
L4
VCC21
B6
K6
VCC22
J8
VCCQ1
K7
VCCQ2
L3
VCCQ3
D4
VPP
VSS1
B4
VSS2
C4
VSS3
L1
L2
VSS4
L5
VSS5
L6
VSS6
VSS7
D4
G5
D5
J6
D6
H7
D7
G2
D8
D9
J3
NC1
A1
NC2
A2 A7
NC3
A8
NC4NC6
M1
NC7
M2 M7
NC8
M8
NC9
P_MODE
K8
K5
P_VCC
S_CS2
A5
A6
F2
A7
E2
A8
F6
A9
D7
CLK
C6
D0
H2
D1
H3
D10
G4
D11
J4
H5
D12
G6
D13
D14
H6
D15
J7
D2
G3
H4
D3
J5
D8
A14
F7
E8
A15
F8
A16
D2
A17
B2
A18
B3
A19
A2
E1
E6
A20
A21
B7
A22
C7
A23
C3
D3
A24
E3
A25
D1
A3
B1
A4
C1
U204
PF38F4050L0ZBQ0
G1
A0
F1
A1
A10
E7
A11
B8
C8
A12
A13
C215
470p
10u
C208
0C221
G1
2
3
G2
5
G3
1
OUT
PWR
4
100
R229
SP0102BE3
MIC
3
4
5
VCC
R221 NA
U203
GND
2
1
C231
1u
TC7SH08FS
VA213
EVLC18S02015
1u
VBAT
C235
C220
NA
C203 0.1u
EVLC18S02015
VA216
100R239
1000p
R_SPK_N
C205
MIDI_ABB_R
MIDI_ABB_L
L_SPK_N
R_SPK_P
R_SPK_N
AUX_SPK_L
ADD15
ADD17
ADD19
ADD21
ADD23
ADD04
ADD06
ADD08
_ROM_CS
_ROM_CS1
_ROM_CS2
_ROM_CS2
SPK_P_SM
_WR
13MHZ
MIC_N
MIC_P
_WR
_RESET
JACK_DETECT
ADD02
ADD11
ADD13
DATA05
DATA06
DATA07
DATA08
DATA09
_WAIT
_ADV
_ROM_CS
_RD
_RAM_CS
_LBS
_RD
_UBS
ADD22
ADD03
ADD05
ADD07
ADD09
BURSTCLK
DATA00
DATA01
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
DATA02
DATA03
DATA04
HEADSET_PATH_SEL
L_SPK_P
_ROM_CS1
ADD01
ADD10
ADD12
ADD14
ADD16
ADD18
ADD20
DATA09 DATA08 _WR
_MIDI_RST
_RD _MIDI_CS ADD00
_MIDI_IRQ
MIDI_HP_L
AUX_SPK_R
AUX_SPK_L
AUX_OUT_R
AUX_OUT_L
MIDI_HP_R
MIDI_HP_R
MIDI_HP_L
I2S_SDO
I2S_WS
I2S_SCK
DATA15 DATA14 DATA13 DATA12 DATA11 DATA10
KEY_COL4
AUX_SPK_R
AUX_MIC_N
AUX_MIC_P
KEY_COL1
KEY_COL2
KEY_COL3
KEY_ROW5
7. CIRCUIT DIAGRAM