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LSIS XGK-CPUU - Page 106

LSIS XGK-CPUU
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Chapter 7 I/O Module
7-25
7.6.3 Smart Link Wiring Diagram
- Wiring Diagram with SLP-T40P - Wiring Diagram with SLP-RY4A, SLP-RY4B
SLP-T40P
terminal
block No.
I/O
module
connector
No.
SLP-T40P
terminal
block No.
B1 B20 A20 A1
B2 B19 A19 A2
B3 B18 A18 A3
B4 B17 A17 A4
B5 B16 A16 A5
B6 B15 A15 A6
B7 B14 A14 A7
B8 B13 A13 A8
B9 B12 A12 A9
B10 B11 A11 A10
B11 B10 A10 A11
B12 B09 A09 A12
B13 B08 A08 A13
B14 B07 A07 A14
B15 B06 A06 A15
B16 B05 A05 A16
B17 B04 A04 A17
B18 B03 A03 A18
B19 B02 A02 A19
B20 B01 A01 A20
SLP-RY4A/B
terminal
block No.
I/O
module
connector
No.
SLP-RY4A/B
terminal
block No.
P0 B20 A20 P10
P1 B19 A19 P11
P2 B18 A18 P12
P3 B17 A17 P13
P4 B16 A16 P14
P5 B15 A15 P15
P6 B14 A14 P16
P7 B13 A13 P17
P8 B12 A12 P18
P9 B11 A11 P19
P0A B10 A10 P1A
P0B B09 A09 P1B
P0C B08 A08 P1C
P0D B07 A07 P1D
P0E B06 A06 P1E
P0F B05 A05 P1F
NC B04 A04 NC
NC B03 A03 NC
+24V B02 A02 -24G
+24V B01 A01 -24G

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