4.2
An economical solution to providing a system clock is shown in Fig.
15. It consists of a 3.579545MHz standard color burst crystal, a
Clock
CD4089 CMOS inverter, and a CD4013 to divide the color burst
Generation
frequency in half. The clock produced for the PSG runs at a
1.7897725MHz rate. Depending on the microcomputer used, its clock
should be selected within its specified value.
Fig. 15 CLOCK GENERATION
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