4.7
As shown in Fig. 20, the wiring is direct between the AY-3-8910 and a
Interfacing to the
CP1600/1610 microprocessor. The levels are compatible thus elimi-
nating any need for level converters. Even the terminology between
CP1600/1610
the IC’s remains constant to provide simple-to-follow connections.
The CP1600/1610 acts as a controller in this configuration fetching
data from ROM’s contained elsewhere in the system. The CP1600/
1610 also acts as the bus controller developing the necessary timing
for the AY-3-8910.
4.7.1 WRITE DATA ROUTINE
The program necessary to write to a selected register is as follows:
MVI value, R0; move in value to be written
MVO R0, Reg; write to register
The routine to load all registers with the same value is as follows:
MVII Reg 0, R4
CLRR R0
Here MVO@ RO, R4
CMPI Reg 0 + 17, R4
BLT Here
4.7.2 READ DATA ROUTINE
The routine to read from a selected register is as follows:
MVI Reg, RO; get data from reg in R0
MVO R0, value; store in memory
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