Minebea Intec PR 5230 - Special Hints for Devicenet and Ethernet-IP; Fieldbus Register

12.2.5 Special hints for DeviceNet and EtherNet-IP
With these eldbus types, the sequence of the bytes (only applicable for words and
individual bytes) is inverted.
With long words, this problem does not arise due to compensation by the rmware.
Sequence of bytes 03, e.g. with device type and software version, see table below.
Standard sequence Sequence for DeviceNet and EtherNet-IP
Byte 0 TYPE MSB Byte 0 SUBVERSION
Byte 1 TYPE LSB Byte 1 MAIN VERSION
Byte 2 MAIN VERSION Byte 2 TYPE LSB
Byte 3 SUBVERSION Byte3 TYPE MSB
Consequently, the sequence on the PLC side must be changed when using the DeviceNet
and EtherNet–IP eld bus types.
12.2.6 Fieldbus register
12.2.6.1 Register 0: I/O status bits (read)
Dynamic status
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Byte 0 Input 3 Input 2 Input 1
Byte 1 Output 3 Output 2 Output 1
Byte 2 Limit 3 Limit 2 Limit 1
Byte 3
12.2.6.2 Register 1: Scale status (read)
Dynamic status
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Byte 0 DIM STND INZSR CZERO BELOW0 OVL >Max ADUERR
Byte 1 E9 E6 E1 E3 E7
Byte 2 PowerFail ActionAc-
tive
CmdError
Byte 3 TareActive CalActive TestActive
Note:
Byte 0 corresponds to byte 7 in the output area; for weight error, see also the table in
Chapter 16.1.
Bit Description
ADUERR Error of analog conversion/load cell circuit (OR function of the E1,
E3, E7 bits).
Transmitter in eld housing PR 5230 12 Fieldbus interface
Minebea Intec EN-264