7 Applied Instructions
7.6 High Speed Processing
277
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
1
Outline
2
Instruction List
3
Configuration of
Instruction
4
How to Read
Explanation of
Instructions
5
Basic Instruction
6
Step Ladder
Instructions
7
Applied
Instructions
8
Interrupt Function
and Pulse Catch
Function
A
Relationships
between devices
and addresses
Function and operation explanation
1. 32-bit operation (DHSCS)
When the current value of a high speed counter of the device specified by becomes the comparison
value of the device specified by (for example, when the current value changes from "199" to "200" or
from "201" to "200" if the comparison value is K200), the bit device specified by is set to ON without
regard to the operation cycle. This instruction is executed after the counting processing in the high speed
counter.
Operation
When the current value of the high speed counter C235 changes from "99" to "100" or from "101" to "100",
Y010 is set to ON (output refresh).
Related instruction
The following instructions can be combined with high speed counters.
Instruction Instruction name
DHSCS High speed counter set
DHSCR High speed counter reset
DHSZ High speed counter zone compare
DHCMOV High speed counter move
DHSCT High speed counter compare with data table
Command input
Label
*1
Comparison source
DHSCS
EN
s1
s2
ENO
d
Output
destination
*1. This defines the comparison value.
OUT_C_32
EN
CCoil
CValue
ENO
CC235
=
→
Set to ON
s1 s2 d
M8000
RUN
monitor
DHSCS
EN
s1
s2
ENO
d
Label
*1
CN235
Y010 K100 =
→
Set to ON
CN235 Y010
*1. This defines K100.
OUT_C_32
EN
CCoil
CValue
ENO
CC235