904
7 APPLICATION INSTRUCTIONS
7.19 Check Code Instructions
• These instructions perform addition of the data stored in the devices specified by (s) to (s)+(n)-1 and calculate the
horizontal parity, and stores the added data in the device specified by (d) and the horizontal parity in the device specified by
(d)+1. The 16-bit conversion mode and 8-bit conversion mode are available for these instructions. The conversion mode
can be selected by turning on or off SM772.
• If the value specified in (n) is 0, no processing is performed.
• If an overflow occurs in the calculated result stored in (d), the following operations are performed. SM700 does not turn on.
• These instructions calculate the horizontal parity value and sum check value as the error check methods used in
communications. There is another check method called CRC (cyclic redundancy check) in addition to the CCD(P)
instruction. (Page 944 CRC(P))
• The operation in each conversion mode is described below.
■16-bit conversion mode (while SM772 is OFF)
With regard to (n) data points starting from (s), the addition data and horizontal parity data of upper 8 bits and lower 8 bits are
stored to (d) and (d)+1 respectively.
When (n)=6
<Calculation of addition data value>
In 16-bit conversion mode, addition data is determined by adding 6 bytes in the following shaded portion. The addition data is
thus determined as "0315H", and therefore "0315H" is stored in the device specified by (d).
<Calculation of horizontal parity value>
In 16-bit conversion mode, the above shaded portion becomes the horizontal parity calculation target.
The number of ON (1) bits is calculated to determine the parity value which becomes ON (1) when the number of ON (1) bits
is finally odd or OFF (0) when it is finally even. The horizontal parity value is stored in the device specified by (d)+1.
In the following table, 5FH is stored in the device specified by (d)+1.
32767+2=-32767
(7FFFH+0002H=8001H)
-32767+-2=32767
(8001H+FFFEH=7FFFH)
Bit/horizontal parity value b7 b6 b5 b4 b3 b2 b1 b0 Value
Upper 8 bits of D0 0 1 1 0 0 0 0 1 61H
Lower 8 bits of D0 0 1 1 0 0 1 0 0 64H
Upper 8 bits of D1 0 0 0 1 0 0 0 0 10H
Lower 8 bits of D1 0 1 1 1 1 0 1 1 7BH
Upper 8 bits of D2 1 1 1 1 1 0 1 0 FAH
Lower 8 bits of D2 1 1 0 0 1 0 1 1 CBH
Horizontal parity value 0 1 0 1 1 1 1 1 5FH
FFH FFH
7FH F9H
D0 24932
D1 4219
D2 -1333
D3 -1
D4 32761
27H 10HD5 10000
61H61H 64H64H
10H10H 7BH7BH
FAHFAH CBHCBH
61H 64H
10H 7BH
FAH CBH
Upper Lower
Decimal Hexadecimal
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