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Mitsubishi Electric MELSEC iQ-RJ71C24-R2 - Page 242

Mitsubishi Electric MELSEC iQ-RJ71C24-R2
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240
11 DATA COMMUNICATIONS USING DC CODE TRANSMISSION CONTROL
11.2 Control Contents of DC Code Control
C24 DC1/DC3 reception control contents
When C24 receives DC3 from the target device, it terminates data transmission.
The program cannot read the received DC3 signal.
When C24 receives DC1 from the target device, it restarts data transmission. (C24 resumes transmission from the data
terminated by the DC3 reception.)
The program cannot read the received DC1 signal.
Once DC1 is received, subsequent DC1 is ignored and removed from the received data.
Remarks
In the DC1/DC3 transmission/reception control, the state of C24 is as follows at the time of power-on, reset or mode switching
of the CPU, or the UINI instruction execution.
C24 does not transmit DC1 to the target device.
C24 is in the same state as when it transmits DC1.
C24 is in the same state as when it received DC1 even if DC1 is not received from the target device.
D
C
3
D
C
1
Target device
C24
Data Data

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