380
19 SWITCHING THE MODE AFTER STARTING
19.3 I/O Signals for Handshake with CPU Module and Buffer Memory
19.3 I/O Signals for Handshake with CPU Module and
Buffer Memory
This section explains the I/O signals for handshake and the buffer memories used when mode switching is performed.
I/O signals for handshake with CPU module
The following signals can also be used as I/O signals, in addition to the above.
• Module READY signal (X1E): Turns ON when C24 can be accessed from the CPU module.
• Watchdog timer error signal (X(n+1)F): Turns ON when C24 does not operate normally.
• 'CH1 Error occurrence' (XE): Turns ON when error occurred on the CH1 side.
• 'CH2 Error occurrence' (XF): Turns ON when error occurred on the CH2 side.
For details on the CPU module I/O signals, refer to the following section.
(Page 493 Input/Output Signal List)
Buffer memory
Type I/O signal Signal name Device turned ON/
OFF
Timing
CH1 CH2 CPU C24
Mode
switching
X6 XD Switching mode
Y2 Y9 Mode switching
request
Address (DEC
(HEX))
Name Setting value/Stored value
CH1 CH2
144 (90H) 304 (130H) For designation of
mode switching
Switching mode No. designation (Page
381 Switching mode No. designation
(Un\G144/304))
0001H: MC protocol (Format 1)
to
00FFH: MELSOFT connection
145 (91H) 305 (131H) Transmission specifications after switching
designation(Page 381 Transmission
specifications after switching designation
(Un\G145/305))
0000H : Match the setting in MELSOFT.
8000H to 8FFFH: Match the setting to that of this area
515 (203H) For confirmation of
parameter setting
and mode switching
Parameter setting error and mode switching
error status
0 : No error
Other than 0: Parameter setting error, mode switching
error
(Page 473 Error Code List)
X6/XD
Y2/Y9
Complete
(Switching)
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