Mitsubishi Electric MELSEC iQ-RJ71C24-R4 - Chapter 12 Data Communications Using Half-Duplex Communications; Half-Duplex Communications

12 DATA COMMUNICATIONS USING HALF-DUPLEX COMMUNICATIONS
12.1 Half-duplex Communications
243
12
12 DATA COMMUNICATIONS USING HALF-
DUPLEX COMMUNICATIONS
This chapter explains the settings to prevent simultaneous transmission from C24 and the target device for data
communication between them using the RS-232 interface.
The setting for each interface is available for RJ71C24-R2.
When C24 is started, full-duplex communications is set. The communication method can be changed by the user according to
the specifications of the target device.
Since the setting for half-duplex communications is not required in the following cases, this chapter can be
skipped.
• When data is only transmitted or received during data communications using the nonprocedural protocol.
• When no data is transmitted from the target device to C24 without direction from C24 by the specifications
of the target device.
12.1 Half-duplex Communications
The following describes the differences between full-duplex communications and half-duplex communications.
Since C24 performs the communication controls on the C24 side with the communication method set by the parameter as
shown below, control by a program is not necessary.
Full-duplex communications
This is a communication method to communicate data with a target device like a conversation pattern with a telephone.
C24 can receive data while transmitting data to the target device.
It can also transmit data while receiving data from the target device.
Half-duplex communications
This is a communication method to communicate data with a target device like a conversation pattern with a transceiver.
When C24 receives data from the target device while transmitting data to the target device, it controls data transmission and
reception according to 'simultaneous transmission priority/non-priority designation'.
C24 does not transmit data while it is receiving data from the target device.
Target device
Data A-1 Data A-2
CPU module
Data B-2
Data B-1
Data A-2Data A-1
Target device
CPU module
Data B-1 Data B-2