Q
E
T
X
S
T
X
02H
51H
20H 3BH 03H0AH 03H
X3
M0
M1
ON
ON
00H,00H
1H
1002H/0H
0H
0H
0H
0H
41BH
15H
6H
3E9H
3E8H
2H
0H
0H
1H
1H
0H
0H
0H
2H
INPUT
Ò
Ó
Ô
Head data
(For reception using the combination
of first frame and last frame)
Since there is no arbitrary data portion,
the receive data count is [0].
Sum check
code
Target device
Station No.
;
The following diagram is for reception using
the combination of first frame and last frame.
Target
device
User frame use enable/disable
designation
Un\G173
First frame No. designation
Un\G174
(1st)
Last frame
First frame
(Correspond to
register No. 3E8H
and 41BH)
CPU module
Un\G175
(2nd)
Un\G176
(3rd)
Reception data
read request
Un\G177
(4th)
Last frame No. designation
Un\G178
(1st)
CPU module
(Each 1st designated frame)
(None)
Un\G179
(2nd)
Completion device
(None)
(3rd)
Un\G180
Abnormal
completion
Status display device
at completion
(None)
(4th)
Un\G181
Normal
completion
(YES) (NO)
Receive transparent code
designation
Un\G288
1 scan
(Disable)
ASCII-BIN conversion
designation
Un\G289
Receive user
frame ( th)
to D0
Un\G603
Receive data
count
to D3
Un\G1536
User frame receive
format designation
Un\G8224
(1st = format-0)
Un\G8225
(2nd = format-0)
Un\G8226
(3rd = format-1)
Un\G8227
(4th = format-1)
Received data count
for format 1 only
Un\G8228
(1st)
Un\G8229
(2nd)
Un\G8230
(3rd)
Un\G8231
(4th)
Buffer memory
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