Mitsubishi Electric MELSEC-Q Series - Page 205

7 REPLACEMENT OF PROGRAM
7 - 18
: Automatic conversion : Manual change required
*1 Note that the buffer memory address between Q series and AnS series may differ.
Description
AnSCPU QnUCPU
Reference
Instruction name Instruction name Conversion
Left rotation of 16-bit data
ROL ROL  Section 7.7.8
ROLP ROLP  Section 7.7.8
Right rotation of 16-bit data
ROR ROR  Section 7.7.8
RORP RORP  Section 7.7.8
Bit device reset RST RST 
Remote I/O station data write RTOP OUT SM1255  Section 7.2.3 (3)
Pointer branch instruction SCJ SCJ 
7 segment decode SEG SEG 
Partial refresh SEG SEG  Section 7.7.8
16-bit data search
SER SER  Section 7.7.8
SERP SERP  Section 7.7.8
Bit device set SET SET 
16-bit data n-bit left shift
SFL SFL 
SFLP SFLP 
16-bit data n-bit right shift
SFR SFR 
SFRP SFRP 
Bit device shift
SFT SFT 
SFTP SFTP 
Setting and resetting status latch
SLT OUT SM1255  Section 7.2.3 (3)
SLTR OUT SM1255  Section 7.2.3 (3)
Carry flag set STC OUT SM1255  Section 7.2.3 (3)
Sequence program stop STOP STOP 
Setting and resetting sampling trace
STRA OUT SM1255  Section 7.2.3 (3)
STRAR OUT SM1255  Section 7.2.3 (3)
16-bit data checks
SUM SUM 
SUMP SUMP 
Microcomputer program
SUB OUT SM1255  Section 7.2.3 (3)
SUBP OUT SM1255  Section 7.2.3 (3)
1-word data write to the intelligent/
special function module
TO TO

*1
TOP TOP

*1
4-bit linking of 16-bit data
UNI UNI 
UNIP UNIP 
Logical products with 16-bit data
WAND WAND 
WANDP WANDP 
WDT reset
WDT WDT 
WDTP WDTP 
Logical sums of 16-bit data
WOR WOR 
WORP WORP 
16-bit data non-exclusive logical sum operations
WXNR WXNR 
WXNRP WXNRP 
16-bit exclusive logical sum operations
WXOR WXOR 
WXORP WXORP 
16-bit data conversion
XCH XCH 
XCHP XCHP 