7 REPLACEMENT OF PROGRAM
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(2) Index register 32-bit specification
When using index register as 32-bit instruction in the AnS series, Z and V that has the same number
with Z are processed as low-order 16-bit value and high-order 16-bit value, respectively.
However, the Q series processes Zn and Zn + 1 as low-order 16 bits and high-order 16 bits,
respectively.
If a program to which "Change PLC type" is performed includes index register with 32-bit specification,
reviewing the index register after "Change PLC type" is necessary.
The following shows an example using an instruction whose operation result will be in 32 bits.
When utilizing the AnS series program to the Q series with "Change PLC type", the operation result may
be stored to the index register having different number as intended one.
(Example)
Instruction AnS series Q series
DMOV D0 Z1
V1, Z1
(High order) (Low order)
Z2, Z1
(High order) (Low order)
/ D0 D1 Z1
Z1 (Quotient)
V1 (Remainder)
Z1 (Quotient)
Z2 (Remainder)
AnS series
Device replaced with "Change PLC type".
Modify this to Z1.
Z and V store quotient
and remainder,
respectively.
Z0 and Z1 store quotient
and remainder,
respectively.
Replaced by the
Q series with
"Change PLC type"
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