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Mitsubishi Electric Q12DCCPU-V - How to Calculate the Transmission Delay Time; Link Scan and Link Device Refresh; Delay Time in Transmission Within the same Network

Mitsubishi Electric Q12DCCPU-V
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5 - 32
5.3 MELSECNET/H Module Access Function
5.3.5 Link data transfer processing time specifications
5
ACCESS VIA NETWORK MODULES
(b) Link scan and link device refresh
Link scans are NOT synchronized with link device refreshes of the C Controller
module.
Link device refreshes are performed in the link device refresh cycles set for the C
Controller module.
(2) How to calculate the transmission delay time
(a) Delay time in transmission within the same network
1) Cyclic transmission (periodic LB/LW/LX/LY communications)
The transmission delay time in B/W/Y communications is calculated with the
following.
Link device refresh cycles of the sending and receiving side C Controller
modules
Link device refresh times of the sending and receiving side C Controller
modules
Scan time (excluding the link refresh time) of the programmable controller
CPU (receiving side)
Link refresh time of the programmable controller CPU (receiving side)
Link scan time
The formulas are as follows:
L
T : Link device refresh cycle of C Controller module (sending side)
L
R : Link device refresh cycle of C Controller module (receiving side)
T : Total link device refresh time of C Controller module (sending side)
*1
Page 5-33
R : Total link device refresh time of C Controller module (receiving side)
*1
Page 5-33
S
R : Scan time (excluding the link refresh time) of programmable controller
CPU (receiving side)
*2
R : Link refresh time of programmable controller CPU (receiving side)
*1,*2
LS : Link scan time
*2
Figure 5.32 Link scan and link device refresh
Link device
refresh
Link device
refresh
Link device
refresh
Link device
refresh
Link device
refresh
Link scan
Link device
refresh cycle
[Transmission delay time (TD1) of B/W/Y communications]
1) When a C Controller module (another CPU) receives data
(Until data are stored into internal link device buffer)
T
D1 = LT + T + (LS 1) + (SR+ R) 2 [ms]
T
D1 = LT + T + (LS 1) + R + LR [ms]
2) When a programmable controller CPU receives data

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