Mitsubishi Electric Q12DCCPU-V - Multiple CPU Synchronous Interrupt Function; Multiple CPU Synchronous Interrupt Function Processing

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COMMUNICATIONS BETWEEN CPU MODULES
13.2 Interrupt from Another CPU
13.2.1 Multiple CPU synchronous interrupt function
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DEVICE DESCRIPTION
10
MULTIPLE CPU SYSTEM OVERVIEW
11
MULTIPLE CPU SYSTEM CONFIGURATION
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CONCEPT OF MULTIPLE CPU SYSTEM
13
COMMUNICATIONS BETWEEN CPU MODULES
14
PARAMETERS ADDED FOR MULTIPLE CPU SYSTEMS
15
STARTING A MULTIPLE CPU SYSTEM
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TROUBLESHOOTING
13.2.1 Multiple CPU synchronous interrupt function
(1) Multiple CPU synchronous interrupt function
By registering a routine capable of the multiple CPU synchronous interrupt with the
QBF_EntryMultiCPUSyncInt function, a program that is executed synchronously with
a Motion CPU (Q172DCPU or Q173DCPU) can be created.
The multiple CPU synchronous interrupt is an interrupt that is issued in the same
cycles (0.88ms) as Motion CPU (Q172DCPU or Q173DCPU) control cycles.
(2) Multiple CPU synchronous interrupt function processing
1) With the QBF_EntryMultiCPUSyncInt function, register a routine that is
capable of the multiple CPU synchronous interrupt.
2) With the QBF_EnableMultiCPUSyncInt function, enable the routine registered
in 1).
(For every multiple CPU synchronous interrupt (periodically), the routine
registered in 1) is executed.)
3) With the QBF_DisableMultiCPUSyncInt function, disable the routine registered
in 1).
(For every multiple CPU synchronous interrupt, the routine registered in 1) will
not be executed.)
Remark
For the bus interface functions, refer to the following.
C Controller Module User's Manual (Utility Operation, Programming)
Q12DCCPU-V
Q06CCPU-V
Q06CCPU-V-B