Mitsubishi Electric Q12DCCPU-V - Receiving Side Program for CPU No.2

13
COMMUNICATIONS BETWEEN CPU MODULES
13.3 Data Communications Using CPU Shared Memory
13.3.4 Data communications without using auto refresh
13 - 37
9
DEVICE DESCRIPTION
10
MULTIPLE CPU SYSTEM OVERVIEW
11
MULTIPLE CPU SYSTEM CONFIGURATION
12
CONCEPT OF MULTIPLE CPU SYSTEM
13
COMMUNICATIONS BETWEEN CPU MODULES
14
PARAMETERS ADDED FOR MULTIPLE CPU SYSTEMS
15
STARTING A MULTIPLE CPU SYSTEM
16
TROUBLESHOOTING
Receiving side program for CPU No.2 (C Controller module)
{
:
unsigned short usBuf; /* Data storage destination */
unsigned short pusData[128]; /* Data storage destination */
:
/****************************************************************/
/* The ON status of CPU No.1 data set completion bit is detected.*/
/****************************************************************/
while(1){
sRet = QBF_FromBuf(lPath, 0x3E0, 10010, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
if( (usBuf & 0x1) == 0x1 ) break; /* When 1 is set, processing gets out from the loop. */
taskDelay(2);
}
/****************************************************************/
/* Data are read out from CPU No.1 user setting area. */
/****************************************************************/
sRet = QBF_FromBuf(lPath, 0x3E0, 10000, 10, pusData, 128);
if( sRet != 0) return(sRet);
/****************************************************************/
/* CPU No.2 data processing completion bit turns ON. */
/****************************************************************/
usBuf = 1;
sRet = QBF_ToBuf(lPath, 0x3E1, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
/****************************************************************/
/* The OFF status of CPU No.1 data set completion bit is detected.*/
/****************************************************************/
while(1){
sRet = QBF_FromBuf(lPath, 0x3E0, 10010, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
if( (usBuf & 0x1) == 0x0 ) break; /* When 0 is set, processing gets out from the loop. */
taskDelay(2);
}
/****************************************************************/
/* CPU No.2 data processing completion bit turns OFF. */
/****************************************************************/
usBuf = 0;
sRet = QBF_ToBuf(lPath, 0x3E1, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
}
Figure 13.25 Interlock program example (continued)
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