APPENDICES
Appendix 1 Function Processing Time
APPX - 5
A
I
3) When accessing the CPU shared memory (multiple CPU high speed
transmission area) of the host CPU in a multiple CPU system (CPU No.1:
Q26UDHCPU, CPU No.2: C Controller module)
4) When accessing the CPU shared memory (multiple CPU high speed
transmission area) of CPU No.1 in a multiple CPU system (CPU No.1:
Q26UDHCPU, CPU No.2: C Controller module)
(2) MELSEC data link function processing time
The MELSEC data link function processing time varies depending on the target
module, and the route and devices used for communication.
When the communication target is a programmable controller CPU, the operating
status, sequence scan time, and link scan time of the programmable controller CPU
may also affect the processing time.
For further details of the MELSEC data link functions, refer to the following.
C Controller Module User's Manual (Utility Operation, Programming)
Table APPX.9 Access time
Function
Communication
size
Access time
Q12DCCPU-V Q06CCPU-V Q06CCPU-V-B
QBF_FromBuf
1 word
7s
64 words
18 s
512 words
94 s
QBF_ToBuf
1 word
7s
64 words
13 s
512 words
68 s
Table APPX.10 Access time
Function
Communication
size
Access time
Q12DCCPU-V Q06CCPU-V Q06CCPU-V-B
QBF_FromBuf
1 word
7s
64 words
18 s
512 words
94 s
QBF_ToBuf
1 word
64 words
512 words
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