Mitsubishi Electric Q62DAN - 3.4 Buffer Memory; 3.4.1 Buffer memory assignment (Q62 DAN;Q62 DA)

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MELSEC-Q
3 SPECIFICATIONS
3.4 Buffer Memory
The explanation in Section 3.4.5 and later is based on the
Q68DAVN/Q68DAIN/Q68DAV/Q68DAI in 8-channel analog output (CH1 to CH8).
3.4.1 Buffer memory assignment (Q62DAN/Q62DA)
This section describes the assignment of the Q62DAN/Q62DA buffer memory.
POINT
Do not write data from System area or sequence program to the buffer memory
area where writing is disabled. Doing so may cause malfunction.
Table 3.7 Buffer memory assignment (Q62DAN/Q62DA) (1/2)
Address
Description
Default
1
Read/write
2
Reference
section
Hexadecimal Decimal
0H 0 D/A conversion enable/disable 3H R/W Section 3.4.5
1H 1 CH1 Digital value 0 R/W
Section 3.4.6
2H 2 CH2 Digital value 0 R/W
3H 3
System area — — —
to to
AH 10
BH 11 CH1 Set value check code 0 R
Section 3.4.7
CH 12 CH2 Set value check code 0 R
DH 13
System area — — —
to to
12H 18
13H 19 Error code 0 R/W Section 3.4.8
14H 20 Setting range (CH1 and CH2) 0H R Section 3.4.9
15H 21 System area — — —
16H 22 Offset/gain setting mode Offset specification 0 R/W
Section 3.4.10
17H 23 Offset/gain setting mode Gain specification 0 R/W
18H 24 Offset/gain adjustment value specification 0 R/W Section 3.4.11
19H 25
System area — — —
to to
9DH 157
9EH 158
Mode switching setting
0 R/W
Section 3.4.12
9FH 159 0 R/W
A0H 160
System area — — —
to to
C7H 199
1 This is the initial value set after the power is turned on or the programmable controller CPU is reset.
2 Indicates whether reading from and writing to a sequence program are enabled.
R : Reading enabled W : Writing enabled