Mitsubishi Electric QD62D - I;O Signals for the Programmable Controller CPU; List of I;O Signals

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MELSEC-Q
3 SPECIFICATIONS
3.3 I/O Signals for the Programmable Controller CPU
3.3.1 List of I/O signals
The I/O signals for the QD62(E/D) programmable controller CPU are listed in the table
below.
For the I/O numbers (X/Y) and I/O addresses indicated in this and succeeding sections,
it is assumed that the QD62(E/D) is mounted into I/O slot 0 of the standard base
module.
Input signal (Signal direction QD62(E/D)
programmable controller CPU)
Output signal (Signal direction programmable
controller CPU QD62(E/D))
Device No. Signal name Device No. Signal name
X00 Module ready Y00 Coincidence signal No. 1 reset command
X01 Counter value large (point No. 1) Y01 Preset command
X02 Counter value coincidence (point No. 1) Y02 Coincidence signal enable command
X03 Counter value small (point No. 1) Y03 Down count command
X04 External preset request detection Y04 Count enable command
X05 Counter value large (point No. 2) Y05 External preset detection reset command
X06 Counter value coincidence (point No. 2) Y06 Counter function selection start command
X07
CH1
Counter value small (point No. 2) Y07
CH1
Coincidence signal No. 2 reset command
X08 Counter value large (point No. 1) Y08 Coincidence signal No. 1 reset command
X09 Counter value coincidence (point No. 1) Y09 Preset command
X0A Counter value small (point No. 1) Y0A Coincidence signal enable command
X0B External preset request detection Y0B Down count command
X0C Counter value large (point No. 2) Y0C Count enable command
X0D Counter value coincidence (point No. 2) Y0D External preset detection reset command
X0E
CH2
Counter value small (point No. 2) Y0E Counter function selection start command
X0F Fuse broken detection flag Y0F
CH2
Coincidence signal No. 2 reset command