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2 MOTION DEDICATED PLC INSTRUCTION
2.3 Precautions
2.3 Precautions
CPU buffer memory address used in Motion dedicated instruction
Information corresponding to positioning dedicated signal is output to the system area on the CPU buffer memory (U3E\G0
to 2k points) of the Motion CPU. When executing Motion dedicated PLC instructions, interlock the signals of this area.
Start accept flag (System area)
The status of each flag is stored in the following address.
CPU buffer memory address
( ) is decimal address
Description
204H(516)
205H(517)
206H(518)
207H(519)
The start accept flag for 64 axes are stored corresponding to each bit.
Bits are actually set as the following:
• R64MTCPU: J1 to J64
• R32MTCPU: J1 to J32
• R16MTCPU: J1 to J16
OFF: Start accept enable
ON: Start accept disable
20EH(526)
20FH(527)
210H(528)
211H(529)
The command generation axis start accept flag for 64 axes are stored corresponding to each bit.
Bits are actually set as the following:
• R64MTCPU: J1 to J64
• R32MTCPU: J1 to J32
• R16MTCPU: J1 to J16
OFF: Start accept enable
ON: Start accept disable
204H(516) address
205H(517) address
206H(518) address
207H(519) address
J16
J32
b15
J1
J17
b0
J2
J18
J48
J64
J33
J49
J34
J50
b1b2
20EH(526) address
20FH(527) address
210H(528) address
211H(529) address
J16
J32
b15
J1
J17
b0
J2
J18
J48
J64
J33
J49
J34
J50
b1b2