Mitsubishi Q00CPU User Manual

APPENDICES
Appendix 2 Special Register List
App - 78
9
Parameters
10
Device Explanation
11
CPU Module Processing Time
12
Procedure for Writing Program to CPU ModuleAppendicesIndex
TableApp.28 Special register
ACPU
Special
Register
Special
Register
after
Conversion
Special
Register for
Modification
Name Meaning Details
Corresponding
CPU
D9053 SD1053 Error transition
Transition condition
number where error
occurred
• Stores the transition condition number, where error code 84 occurred
in an SFC program, in BIN value.
Stores "0" when error code 80, 81, 82 or 83 occurred.
QnA
Qn(H)
QnPH
D9054 SD1054
Error sequence
step
Sequence step
number where error
occurred
• Stores the sequence step number of transfer condition and
operation output in which error 84 occurred in the SFC program in
BIN code.
D9055 SD1055 SD812
Status latch
execution step
number
Status latch step
• Stores the step number when status latch is executed.
• Stores the step number in a binary value if status latch is executed
in a main sequence program.
• Stores the block number and the step number if status latch is
executed in a SFC program.
D9060 SD1060 SD392
Software
version
Software version of
internal software
• Stores the software version of the internal system in ASCII code.
Note: The software version of the initial system may differ from the
version indicated by the version information printed on the rear
of the case.
QnA
D9072 SD1072
PLC
communication
check
Data check of serial
communication
module
• In the self-loopback test of the serial communication module, the
serial communication module writes/reads data automatically to
make communication checks.
QnA
Qn(H)
QnPH
D9081 SD1081 SD714
Number of
empty blocks in
communications
request
registrtion area
Number of empty
blocks in
communications
request registration
area
• Stores the number of empty blocks in the communication request
registration area to the remote terminal module connected to the
MELSECNET/MINI-S3 master unit, A2CCPU or A52GCPU.
QnA
D9085 SD1085
Register for
setting time
check value
1 s to 65535 s
• Sets the time check time of the data link instructions (ZNRD,
ZNWR) for the MELSECNET/10.
• Setting range : 1 s to 65535 s (1 to 65535)
• Setting unit : 1 s
• Default value : 10 s (If 0 has been set, default 10 s is applied)
QnA
Qn(H)
QnPH
D9090 SD1090
Number of
special
functions
modules over
Number of special
functions modules
over
• For details, refer to the manual of each microcomputer program
package.
D9091 SD1091
Detailed error
code
Self-diagnosis
detailed error code
• Stores the detail code of cause of an instruction error.
D9094 SD1094 SD251
Head I/O
number of I/O
module to be
replaced
Head I/O number of I/
O module to be
replaced
• Stores the first two digits of the head I/O number of the I/O module,
which will be dismounted/mounted online (with power on), in BIN
value.
Example) Input module X2F0 H2F
D9095 SD1095 SD200
DIP switch
information
DIP switch
information
• The DIP switch information of the CPU module is stored in the
following format.
0: OFF
1: ON
Qn(H)
QnPH
Lower 8 bits
Upper 8 bits
Block No.
(BIN)
Step No.
(BIN)
Upper byte Lower byte
Stored into lower
byte
Undefind value in
higher byte
For version "A", for example, "41
H" is stored.
SW1
SW2
b0b1b2b3b4b5b15
SW3
SW4
SW5
D9095
to
0

Mitsubishi Q00CPU Specifications

General

Brand	Mitsubishi
Model	Q00CPU
Category	Controller
Language	English