MPC823e Instruction Set—and
B-16 MPC823e REFERENCE MANUAL MOTOROLA
INSTRUCTION SET
B
and
Asembler Syntax and rA,rS,rB (Rc = 0)
and. rA,rS,rB (Rc = 1)
Definition And
Operation rA ← (rS) & (rB)
Description The contents of rS are ANDed with the contents of rB and the
result is placed into rA.
Other registers altered:
❏ Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD 31 S A
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD B28RC
POWERPC ARCHITECTURE
LEVEL
SUPERVISOR
LEVEL
OPTIONAL FORM
UISA X
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