Topaz T2688/T200, T2988/T205 L3 Circuit Description
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Motorola Proprietary Information
23. The processed digital audio is received from the Gemini at 8Khz, from here the signal
is interpolated within a speech-digital infinite duration impulse response filter (IIR)
(i.e. that is, for the data coming in, the adjacent bits of the data being looked at are all
synchronised and an average taken. From this a prediction of events can be
calculated) also the sampling rate is increased to 1Mhz and the speech bandwidth is
limited by high and Low pass responses.
24. The signal is then fed into a Sigma-Delta Modulator for D/A conversion this will
then give a 1 bit over-sampled signal
25. This over-sampled signal (we over-sample to allow much cheaper and easier
reconstruction of the received signal) is now D/A’d and a high frequency noise tone is
injected into the signal. This noise will be used for programming the PGA. There are
7 programmable gains and 1 mute function.
26. The noise is then removed in a smoothing filter and the appropriate gains or
attenuations made.
27. The converted speech can then take 1 of 2 paths.
28. Path 1 to the Internal speaker LS1, the audio is fed out of the VEGA on Pins 32 &
33, and fed directly to the speaker, voltage suppressers U4 and U5 are responsible for
ESD protection. The speaker is situated in the front housing of the unit and is
connected to the main PCB through 2 contact springs.
29. Path 2 to an External Speaker, the audio is fed out from the VEGA IC on Pin 34
AUXO, it passes through Connector 3, J10 which is a jumper connector for JTAG
purposes. From here it is fed to Pin 4 of the External Connector J40.
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