In USB Device applications, the IRC48M block can be enabled in USB Clock Recovery
mode in which the internal IRC48M oscillator is tuned to match the clock extracted from
the incoming USB data stream. This functionality provides the capability of generating a
high precision 48MHz clock source without requiring an on-chip PLL or an associated
off-chip crystal circuit.
If the USB Device connection is removed from the Host, the IRC48M USB Clock
Recovery functionality stops tuning the internal IRC48M oscillator since the clock
extracted from the USB data stream is disconnected. The 48MHz clock source frequency
does not shift after the USB Device is removed from the USB Host. If the IRC48M clock
is selected as the source of the PLL with MCG_C7[OSCSEL]=10 then the clock
frequency of the system clocks can shift as the USB device connects to the USB Host
starting clock recovery tuning.
The IRC48MCLK is also available for use as:
• an oscillator reference to the MCG - from which core, system, bus, and flash clock
sources can be derived
• an ADC alternate clock source
• clock source for LPUART communications
• clock source for I2S/SAI communications
5.7.3
WDOG clocking
The WDOG may be clocked from two clock sources as shown in the following figure.
WDOG_STCTRLH[CLKSRC]
WDOG clock
Bus clock
LPO
Figure 5-2. WDOG clock generation
5.7.4
Debug trace clock
The debug trace clock source can be clocked as shown in the following figure.
Chapter 5 Clock Distribution
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 161
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