NXP Semiconductors KL25 Series - Page 205

SIM_SCGC4 field descriptions (continued)
Field Description
0 Clock disabled
1 Clock enabled
17–14
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
13
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12
UART2
UART2 Clock Gate Control
This bit controls the clock gate to the UART2 module.
0 Clock disabled
1 Clock enabled
11
UART1
UART1 Clock Gate Control
This bit controls the clock gate to the UART1 module.
0 Clock disabled
1 Clock enabled
10
UART0
UART0 Clock Gate Control
This bit controls the clock gate to the UART0 module.
0 Clock disabled
1 Clock enabled
9–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
I2C1
I2C1 Clock Gate Control
This bit controls the clock gate to the I
2
C1 module.
0 Clock disabled
1 Clock enabled
6
I2C0
I2C0 Clock Gate Control
This bit controls the clock gate to the I
2
C0 module.
0 Clock disabled
1 Clock enabled
5–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 1.
3–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Chapter 12 System integration module (SIM)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 205