NXP Semiconductors KL25 Series - LLWU Module Enable Register (LLWU_ME)

Address: 4007_C000h base + 3h offset = 4007_C003h
Bit 7 6 5 4 3 2 1 0
Read
WUPE15 WUPE14 WUPE13 WUPE12
Write
Reset
0 0 0 0 0 0 0 0
LLWU_PE4 field descriptions
Field Description
7–6
WUPE15
Wakeup Pin Enable For LLWU_P15
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
5–4
WUPE14
Wakeup Pin Enable For LLWU_P14
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
3–2
WUPE13
Wakeup Pin Enable For LLWU_P13
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
1–0
WUPE12
Wakeup Pin Enable For LLWU_P12
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
15.3.5 LLWU Module Enable register (LLWU_ME)
LLWU_ME contains the bits to enable the internal module flag as a wakeup input source
for inputs MWUF7-MWUF0.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
Chapter 15 Low-Leakage Wakeup Unit (LLWU)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 253